RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-11-24 12:19:53 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Eliminate some deep std::vector copies. NFC.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218999 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2014-10-03 18:33:16 +00:00
parent 3c5eaffc07
commit 63688e622c
14 changed files with 25 additions and 50 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
include/llvm/Target/TargetLowering.h
View File

@ -2547,11 +2547,10 @@ public:
unsigned getMatchedOperand() const;
/// Copy constructor for copying from a ConstraintInfo.
AsmOperandInfo(const InlineAsm::ConstraintInfo &info)
: InlineAsm::ConstraintInfo(info),
ConstraintType(TargetLowering::C_Unknown),
CallOperandVal(nullptr), ConstraintVT(MVT::Other) {
}
AsmOperandInfo(InlineAsm::ConstraintInfo Info)
: InlineAsm::ConstraintInfo(std::move(Info)),
ConstraintType(TargetLowering::C_Unknown), CallOperandVal(nullptr),
ConstraintVT(MVT::Other) {}
};
typedef std::vector<AsmOperandInfo> AsmOperandInfoVector;

20
lib/CodeGen/MachineLICM.cpp
View File

@ -143,9 +143,6 @@ namespace {
RegPressure.clear();
RegLimit.clear();
BackTrace.clear();
for (DenseMap<unsigned,std::vector<const MachineInstr*> >::iterator
CI = CSEMap.begin(), CE = CSEMap.end(); CI != CE; ++CI)
CI->second.clear();
CSEMap.clear();
}
@ -1300,15 +1297,7 @@ void MachineLICM::InitCSEMap(MachineBasicBlock *BB) {
for (MachineBasicBlock::iterator I = BB->begin(),E = BB->end(); I != E; ++I) {
const MachineInstr *MI = &*I;
unsigned Opcode = MI->getOpcode();
DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator
CI = CSEMap.find(Opcode);
if (CI != CSEMap.end())
CI->second.push_back(MI);
else {
std::vector<const MachineInstr*> CSEMIs;
CSEMIs.push_back(MI);
CSEMap.insert(std::make_pair(Opcode, CSEMIs));
}
CSEMap[Opcode].push_back(MI);
}
}
@ -1448,11 +1437,8 @@ bool MachineLICM::Hoist(MachineInstr *MI, MachineBasicBlock *Preheader) {
// Add to the CSE map.
if (CI != CSEMap.end())
CI->second.push_back(MI);
else {
std::vector<const MachineInstr*> CSEMIs;
CSEMIs.push_back(MI);
CSEMap.insert(std::make_pair(Opcode, CSEMIs));
}
else
CSEMap[Opcode].push_back(MI);
}
++NumHoisted;

9
lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -2241,14 +2241,11 @@ TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints(
// Do a prepass over the constraints, canonicalizing them, and building up the
// ConstraintOperands list.
InlineAsm::ConstraintInfoVector
ConstraintInfos = IA->ParseConstraints();
unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
unsigned ResNo = 0; // ResNo - The result number of the next output.
for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i]));
for (InlineAsm::ConstraintInfo &CI : IA->ParseConstraints()) {
ConstraintOperands.emplace_back(std::move(CI));
AsmOperandInfo &OpInfo = ConstraintOperands.back();
// Update multiple alternative constraint count.
@ -2327,7 +2324,7 @@ TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints(
}
// If we have multiple alternative constraints, select the best alternative.
if (ConstraintInfos.size()) {
if (ConstraintOperands.size()) {
if (maCount) {
unsigned bestMAIndex = 0;
int bestWeight = -1;

2
lib/ProfileData/CoverageMapping.cpp
View File

@ -202,7 +202,7 @@ CoverageMapping::load(ObjectFileCoverageMappingReader &CoverageReader,
continue;
}
Coverage->Functions.push_back(Function);
Coverage->Functions.push_back(std::move(Function));
}
return std::move(Coverage);

1
lib/ProfileData/InstrProfWriter.cpp
View File

@ -111,7 +111,6 @@ void InstrProfWriter::write(raw_fd_ostream &OS) {
OnDiskChainedHashTableGenerator<InstrProfRecordTrait> Generator;
// Populate the hash table generator.
std::vector<uint64_t> CounterBuffer;
for (const auto &I : FunctionData)
Generator.insert(I.getKey(), &I.getValue());

2
lib/TableGen/TGParser.cpp
View File

@ -2262,7 +2262,7 @@ bool TGParser::ParseTopLevelLet(MultiClass *CurMultiClass) {
// Add this entry to the let stack.
std::vector<LetRecord> LetInfo = ParseLetList();
if (LetInfo.empty()) return true;
LetStack.push_back(LetInfo);
LetStack.push_back(std::move(LetInfo));
if (Lex.getCode() != tgtok::In)
return TokError("expected 'in' at end of top-level 'let'");

4
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
View File

@ -352,7 +352,7 @@ bool AArch64A57FPLoadBalancing::runOnBasicBlock(MachineBasicBlock &MBB) {
for (auto I = EC.begin(), E = EC.end(); I != E; ++I) {
std::vector<Chain*> Cs(EC.member_begin(I), EC.member_end());
if (Cs.empty()) continue;
V.push_back(Cs);
V.push_back(std::move(Cs));
}
// Now we have a set of sets, order them by start address so
@ -377,7 +377,7 @@ bool AArch64A57FPLoadBalancing::runOnBasicBlock(MachineBasicBlock &MBB) {
int Parity = 0;
for (auto &I : V)
Changed |= colorChainSet(I, MBB, Parity);
Changed |= colorChainSet(std::move(I), MBB, Parity);
return Changed;
}

4
lib/Target/ARM/ARMConstantIslandPass.cpp
View File

@ -556,9 +556,7 @@ ARMConstantIslands::doInitialPlacement(std::vector<MachineInstr*> &CPEMIs) {
InsPoint[a] = CPEMI;
// Add a new CPEntry, but no corresponding CPUser yet.
std::vector<CPEntry> CPEs;
CPEs.push_back(CPEntry(CPEMI, i));
CPEntries.push_back(CPEs);
CPEntries.emplace_back(1, CPEntry(CPEMI, i));
++NumCPEs;
DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = "
<< Size << ", align = " << Align <<'\n');

4
lib/Target/Mips/MipsConstantIslandPass.cpp
View File

@ -590,9 +590,7 @@ MipsConstantIslands::doInitialPlacement(std::vector<MachineInstr*> &CPEMIs) {
if (InsPoint[a] == InsAt)
InsPoint[a] = CPEMI;
// Add a new CPEntry, but no corresponding CPUser yet.
std::vector<CPEntry> CPEs;
CPEs.push_back(CPEntry(CPEMI, i));
CPEntries.push_back(CPEs);
CPEntries.emplace_back(1, CPEntry(CPEMI, i));
++NumCPEs;
DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = "
<< Size << ", align = " << Align <<'\n');

4
lib/Target/R600/R600ControlFlowFinalizer.cpp
View File

@ -336,7 +336,7 @@ private:
getHWInstrDesc(IsTex?CF_TC:CF_VC))
.addImm(0) // ADDR
.addImm(AluInstCount - 1); // COUNT
return ClauseFile(MIb, ClauseContent);
return ClauseFile(MIb, std::move(ClauseContent));
}
void getLiteral(MachineInstr *MI, std::vector<int64_t> &Lits) const {
@ -426,7 +426,7 @@ private:
}
assert(ClauseContent.size() < 128 && "ALU clause is too big");
ClauseHead->getOperand(7).setImm(ClauseContent.size() - 1);
return ClauseFile(ClauseHead, ClauseContent);
return ClauseFile(ClauseHead, std::move(ClauseContent));
}
void

2
lib/Target/R600/R600InstrInfo.cpp
View File

@ -571,7 +571,7 @@ R600InstrInfo::fitsReadPortLimitations(const std::vector<MachineInstr *> &IG,
if (!isLastAluTrans)
return FindSwizzleForVectorSlot(IGSrcs, ValidSwizzle, TransOps, TransBS);
TransOps = IGSrcs.back();
TransOps = std::move(IGSrcs.back());
IGSrcs.pop_back();
ValidSwizzle.pop_back();

5
lib/Target/R600/R600OptimizeVectorRegisters.cpp
View File

@ -280,9 +280,8 @@ bool R600VectorRegMerger::tryMergeUsingCommonSlot(RegSeqInfo &RSI,
continue;
if (PreviousRegSeqByReg[MOp->getReg()].empty())
continue;
std::vector<MachineInstr *> MIs = PreviousRegSeqByReg[MOp->getReg()];
for (unsigned i = 0, e = MIs.size(); i < e; i++) {
CompatibleRSI = PreviousRegSeq[MIs[i]];
for (MachineInstr *MI : PreviousRegSeqByReg[MOp->getReg()]) {
CompatibleRSI = PreviousRegSeq[MI];
if (RSI == CompatibleRSI)
continue;
if (tryMergeVector(&CompatibleRSI, &RSI, RemapChan))

7
lib/Target/XCore/XCoreFrameLowering.cpp
View File

@ -312,11 +312,10 @@ void XCoreFrameLowering::emitPrologue(MachineFunction &MF) const {
if (emitFrameMoves) {
// Frame moves for callee saved.
auto SpillLabels = XFI->getSpillLabels();
for (unsigned I = 0, E = SpillLabels.size(); I != E; ++I) {
MachineBasicBlock::iterator Pos = SpillLabels[I].first;
for (const auto &SpillLabel : XFI->getSpillLabels()) {
MachineBasicBlock::iterator Pos = SpillLabel.first;
++Pos;
CalleeSavedInfo &CSI = SpillLabels[I].second;
const CalleeSavedInfo &CSI = SpillLabel.second;
int Offset = MFI->getObjectOffset(CSI.getFrameIdx());
unsigned DRegNum = MRI->getDwarfRegNum(CSI.getReg(), true);
EmitCfiOffset(MBB, Pos, dl, TII, MMI, DRegNum, Offset);

2
lib/Transforms/IPO/ArgumentPromotion.cpp
View File

@ -530,7 +530,7 @@ bool ArgPromotion::isSafeToPromoteArgument(Argument *Arg,
// of elements of the aggregate.
return false;
}
ToPromote.insert(Operands);
ToPromote.insert(std::move(Operands));
}
}