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[msan] Origin stores and loads do not need explicit alignment.
Origin address is always 4 byte aligned, and the access type is always i32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170199 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -421,7 +421,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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if (ClTrackOrigins) {
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if (ClStoreCleanOrigin || isa<StructType>(Shadow->getType())) {
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IRB.CreateAlignedStore(getOrigin(Val), getOriginPtr(Addr, IRB), I.getAlignment());
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IRB.CreateStore(getOrigin(Val), getOriginPtr(Addr, IRB));
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} else {
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Value *ConvertedShadow = convertToShadowTyNoVec(Shadow, IRB);
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@ -435,10 +435,10 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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Value *Cmp = IRB.CreateICmpNE(ConvertedShadow,
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getCleanShadow(ConvertedShadow), "_mscmp");
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Instruction *CheckTerm =
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SplitBlockAndInsertIfThen(cast<Instruction>(Cmp), false, MS.OriginStoreWeights);
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IRBuilder<> IRBNewBlock(CheckTerm);
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IRBNewBlock.CreateAlignedStore(getOrigin(Val),
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getOriginPtr(Addr, IRBNewBlock), I.getAlignment());
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SplitBlockAndInsertIfThen(cast<Instruction>(Cmp), false,
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MS.OriginStoreWeights);
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IRBuilder<> IRBNew(CheckTerm);
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IRBNew.CreateStore(getOrigin(Val), getOriginPtr(Addr, IRBNew));
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}
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}
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}
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@ -787,7 +787,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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insertCheck(I.getPointerOperand(), &I);
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if (ClTrackOrigins)
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setOrigin(&I, IRB.CreateAlignedLoad(getOriginPtr(Addr, IRB), I.getAlignment()));
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setOrigin(&I, IRB.CreateLoad(getOriginPtr(Addr, IRB)));
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}
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/// \brief Instrument StoreInst
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@ -1296,9 +1296,8 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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kShadowTLSAlignment);
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}
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if (ClTrackOrigins)
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IRB.CreateAlignedStore(getOrigin(A),
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getOriginPtrForArgument(A, IRB, ArgOffset),
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kShadowTLSAlignment);
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IRB.CreateStore(getOrigin(A),
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getOriginPtrForArgument(A, IRB, ArgOffset));
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assert(Size != 0 && Store != 0);
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DEBUG(dbgs() << " Param:" << *Store << "\n");
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ArgOffset += DataLayout::RoundUpAlignment(Size, 8);
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@ -8,7 +8,9 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
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; Check the presence and the linkage type of __msan_track_origins
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; CHECK: @__msan_track_origins = weak_odr constant i32 0
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; Check instrumentation of stores
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define void @Store(i32* nocapture %p, i32 %x) nounwind uwtable {
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entry:
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store i32 %x, i32* %p, align 4
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@ -33,6 +35,34 @@ entry:
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; CHECK-ORIGINS: ret void
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; Check instrumentation of aligned stores
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; Shadow store has the same alignment as the original store; origin store
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; does not specify explicit alignment.
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define void @AlignedStore(i32* nocapture %p, i32 %x) nounwind uwtable {
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entry:
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store i32 %x, i32* %p, align 32
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ret void
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}
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; CHECK: @AlignedStore
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; CHECK: load {{.*}} @__msan_param_tls
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; CHECK: store {{.*}} align 32
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; CHECK: store {{.*}} align 32
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; CHECK: ret void
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; CHECK-ORIGINS: @AlignedStore
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; CHECK-ORIGINS: load {{.*}} @__msan_param_tls
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; CHECK-ORIGINS: store {{.*}} align 32
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; CHECK-ORIGINS: icmp
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; CHECK-ORIGINS: br i1
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; CHECK-ORIGINS: <label>
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; CHECK-ORIGINS-NOT: store {{.*}} align
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; CHECK-ORIGINS: br label
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; CHECK-ORIGINS: <label>
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; CHECK-ORIGINS: store {{.*}} align 32
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; CHECK-ORIGINS: ret void
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; load followed by cmp: check that we load the shadow and call __msan_warning.
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define void @LoadAndCmp(i32* nocapture %a) nounwind uwtable {
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entry:
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