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[C++11,ARM64] Range based for and explicit 'override' in STP cleanup.

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No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205446 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2014-04-02 18:00:59 +00:00
parent 252303f4ad
commit 6408bdcacd
1 changed files with 13 additions and 15 deletions
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28
lib/Target/ARM64/ARM64StorePairSuppress.cpp
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@ -38,18 +38,18 @@ public:
static char ID; static char ID;
ARM64StorePairSuppress() : MachineFunctionPass(ID) {} ARM64StorePairSuppress() : MachineFunctionPass(ID) {}
virtual const char *getPassName() const { virtual const char *getPassName() const override {
return "ARM64 Store Pair Suppression"; return "ARM64 Store Pair Suppression";
} }
bool runOnMachineFunction(MachineFunction &F); bool runOnMachineFunction(MachineFunction &F) override;
private: private:
bool shouldAddSTPToBlock(const MachineBasicBlock *BB); bool shouldAddSTPToBlock(const MachineBasicBlock *BB);
bool isNarrowFPStore(const MachineInstr *MI); bool isNarrowFPStore(const MachineInstr &MI);
virtual void getAnalysisUsage(AnalysisUsage &AU) const { virtual void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG(); AU.setPreservesCFG();
AU.addRequired<MachineTraceMetrics>(); AU.addRequired<MachineTraceMetrics>();
AU.addPreserved<MachineTraceMetrics>(); AU.addPreserved<MachineTraceMetrics>();
@ -103,8 +103,8 @@ bool ARM64StorePairSuppress::shouldAddSTPToBlock(const MachineBasicBlock *BB) {
/// ///
/// FIXME: We plan to develop a decent Target abstraction for simple loads and /// FIXME: We plan to develop a decent Target abstraction for simple loads and
/// stores. Until then use a nasty switch similar to ARM64LoadStoreOptimizer. /// stores. Until then use a nasty switch similar to ARM64LoadStoreOptimizer.
bool ARM64StorePairSuppress::isNarrowFPStore(const MachineInstr *MI) { bool ARM64StorePairSuppress::isNarrowFPStore(const MachineInstr &MI) {
switch (MI->getOpcode()) { switch (MI.getOpcode()) {
default: default:
return false; return false;
case ARM64::STRSui: case ARM64::STRSui:
@ -138,25 +138,23 @@ bool ARM64StorePairSuppress::runOnMachineFunction(MachineFunction &mf) {
// precisely determine whether a store pair can be formed. But we do want to // precisely determine whether a store pair can be formed. But we do want to
// filter out most situations where we can't form store pairs to avoid // filter out most situations where we can't form store pairs to avoid
// computing trace metrics in those cases. // computing trace metrics in those cases.
for (MachineFunction::iterator BI = MF->begin(), BE = MF->end(); BI != BE; for (auto &MBB: *MF) {
++BI) {
bool SuppressSTP = false; bool SuppressSTP = false;
unsigned PrevBaseReg = 0; unsigned PrevBaseReg = 0;
for (MachineBasicBlock::iterator I = BI->begin(), E = BI->end(); I != E; for (auto &MI: MBB) {
++I) { if (!isNarrowFPStore(MI))
if (!isNarrowFPStore(I))
continue; continue;
unsigned BaseReg; unsigned BaseReg;
unsigned Offset; unsigned Offset;
if (TII->getLdStBaseRegImmOfs(I, BaseReg, Offset, TRI)) { if (TII->getLdStBaseRegImmOfs(&MI, BaseReg, Offset, TRI)) {
if (PrevBaseReg == BaseReg) { if (PrevBaseReg == BaseReg) {
// If this block can take STPs, skip ahead to the next block. // If this block can take STPs, skip ahead to the next block.
if (!SuppressSTP && shouldAddSTPToBlock(I->getParent())) if (!SuppressSTP && shouldAddSTPToBlock(MI.getParent()))
break; break;
// Otherwise, continue unpairing the stores in this block. // Otherwise, continue unpairing the stores in this block.
DEBUG(dbgs() << "Unpairing store " << *I << "\n"); DEBUG(dbgs() << "Unpairing store " << MI << "\n");
SuppressSTP = true; SuppressSTP = true;
TII->suppressLdStPair(I); TII->suppressLdStPair(&MI);
} }
PrevBaseReg = BaseReg; PrevBaseReg = BaseReg;
} else } else