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Move a check to the validateInstruction() function where it more properly belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162954 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4150,17 +4150,6 @@ cvtLdWriteBackRegAddrMode3(MCInst &Inst, unsigned Opcode,
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bool ARMAsmParser::
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cvtThumbMultiply(MCInst &Inst, unsigned Opcode,
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const SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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// The second source operand must be the same register as the destination
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// operand.
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if (Operands.size() == 6 &&
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(((ARMOperand*)Operands[3])->getReg() !=
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((ARMOperand*)Operands[5])->getReg()) &&
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(((ARMOperand*)Operands[3])->getReg() !=
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((ARMOperand*)Operands[4])->getReg())) {
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Error(Operands[3]->getStartLoc(),
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"destination register must match source register");
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return false;
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}
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((ARMOperand*)Operands[3])->addRegOperands(Inst, 1);
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((ARMOperand*)Operands[1])->addCCOutOperands(Inst, 1);
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// If we have a three-operand form, make sure to set Rn to be the operand
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@ -5377,6 +5366,19 @@ validateInstruction(MCInst &Inst,
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"in register list");
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break;
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}
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case ARM::tMUL: {
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// The second source operand must be the same register as the destination
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// operand.
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if (Operands.size() == 6 &&
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(((ARMOperand*)Operands[3])->getReg() !=
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((ARMOperand*)Operands[5])->getReg()) &&
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(((ARMOperand*)Operands[3])->getReg() !=
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((ARMOperand*)Operands[4])->getReg())) {
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Error(Operands[3]->getStartLoc(),
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"destination register must match source register");
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}
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break;
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}
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// Like for ldm/stm, push and pop have hi-reg handling version in Thumb2,
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// so only issue a diagnostic for thumb1. The instructions will be
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// switched to the t2 encodings in processInstruction() if necessary.
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