Move a check to the validateInstruction() function where it more properly belongs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162954 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2012-08-30 23:20:38 +00:00
parent cee2f72bfe
commit 64b3444cbf

View File

@ -4150,17 +4150,6 @@ cvtLdWriteBackRegAddrMode3(MCInst &Inst, unsigned Opcode,
bool ARMAsmParser::
cvtThumbMultiply(MCInst &Inst, unsigned Opcode,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
// The second source operand must be the same register as the destination
// operand.
if (Operands.size() == 6 &&
(((ARMOperand*)Operands[3])->getReg() !=
((ARMOperand*)Operands[5])->getReg()) &&
(((ARMOperand*)Operands[3])->getReg() !=
((ARMOperand*)Operands[4])->getReg())) {
Error(Operands[3]->getStartLoc(),
"destination register must match source register");
return false;
}
((ARMOperand*)Operands[3])->addRegOperands(Inst, 1);
((ARMOperand*)Operands[1])->addCCOutOperands(Inst, 1);
// If we have a three-operand form, make sure to set Rn to be the operand
@ -5377,6 +5366,19 @@ validateInstruction(MCInst &Inst,
"in register list");
break;
}
case ARM::tMUL: {
// The second source operand must be the same register as the destination
// operand.
if (Operands.size() == 6 &&
(((ARMOperand*)Operands[3])->getReg() !=
((ARMOperand*)Operands[5])->getReg()) &&
(((ARMOperand*)Operands[3])->getReg() !=
((ARMOperand*)Operands[4])->getReg())) {
Error(Operands[3]->getStartLoc(),
"destination register must match source register");
}
break;
}
// Like for ldm/stm, push and pop have hi-reg handling version in Thumb2,
// so only issue a diagnostic for thumb1. The instructions will be
// switched to the t2 encodings in processInstruction() if necessary.