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Rewrite shift/and/compare sequences to promote better licm of the RHS.
Use isLogicalShift/isArithmeticShift to simplify code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30448 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
20fdab6fbf
commit
65b72baa59
@ -3856,7 +3856,7 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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// happens a LOT in code produced by the C front-end, for bitfield
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// access.
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ShiftInst *Shift = dyn_cast<ShiftInst>(LHSI->getOperand(0));
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ConstantInt *AndCST = cast<ConstantInt>(LHSI->getOperand(1));
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Constant *AndCST = cast<ConstantInt>(LHSI->getOperand(1));
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// Check to see if there is a noop-cast between the shift and the and.
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if (!Shift) {
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@ -3866,7 +3866,7 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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CI->getType()->getPrimitiveSizeInBits())
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Shift = dyn_cast<ShiftInst>(CI->getOperand(0));
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}
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ConstantUInt *ShAmt;
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ShAmt = Shift ? dyn_cast<ConstantUInt>(Shift->getOperand(1)) : 0;
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const Type *Ty = Shift ? Shift->getType() : 0; // Type of the shift.
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@ -3876,8 +3876,7 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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// into the mask. This can only happen with signed shift
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// rights, as they sign-extend.
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if (ShAmt) {
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bool CanFold = Shift->getOpcode() != Instruction::Shr ||
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Ty->isUnsigned();
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bool CanFold = Shift->isLogicalShift();
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if (!CanFold) {
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// To test for the bad case of the signed shr, see if any
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// of the bits shifted in could be tested after the mask.
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@ -3930,15 +3929,49 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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}
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}
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}
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// Turn ((X >> Y) & C) == 0 into (X & (C << Y)) == 0. The later is
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// preferable because it allows the C<<Y expression to be hoisted out
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// of a loop if Y is invariant and X is not.
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if (Shift && Shift->hasOneUse() && CI->isNullValue() &&
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I.isEquality() && !Shift->isArithmeticShift()) {
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// Compute C << Y.
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Value *NS;
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if (Shift->getOpcode() == Instruction::Shr) {
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NS = new ShiftInst(Instruction::Shl, AndCST, Shift->getOperand(1),
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"tmp");
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} else {
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// Make sure we insert a logical shift.
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if (AndCST->getType()->isSigned())
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AndCST = ConstantExpr::getCast(AndCST,
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AndCST->getType()->getUnsignedVersion());
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NS = new ShiftInst(Instruction::Shr, AndCST, Shift->getOperand(1),
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"tmp");
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}
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InsertNewInstBefore(cast<Instruction>(NS), I);
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// If C's sign doesn't agree with the and, insert a cast now.
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if (NS->getType() != LHSI->getType())
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NS = InsertCastBefore(NS, LHSI->getType(), I);
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Value *ShiftOp = Shift->getOperand(0);
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if (ShiftOp->getType() != LHSI->getType())
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ShiftOp = InsertCastBefore(ShiftOp, LHSI->getType(), I);
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// Compute X & (C << Y).
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Instruction *NewAnd =
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BinaryOperator::createAnd(ShiftOp, NS, LHSI->getName());
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InsertNewInstBefore(NewAnd, I);
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I.setOperand(0, NewAnd);
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return &I;
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}
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}
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break;
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case Instruction::Shl: // (setcc (shl X, ShAmt), CI)
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if (ConstantUInt *ShAmt = dyn_cast<ConstantUInt>(LHSI->getOperand(1))) {
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switch (I.getOpcode()) {
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default: break;
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case Instruction::SetEQ:
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case Instruction::SetNE: {
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if (I.isEquality()) {
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unsigned TypeBits = CI->getType()->getPrimitiveSizeInBits();
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// Check that the shift amount is in range. If not, don't perform
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@ -3979,17 +4012,12 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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ConstantExpr::getUShr(CI, ShAmt));
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}
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}
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}
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}
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break;
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case Instruction::Shr: // (setcc (shr X, ShAmt), CI)
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if (ConstantUInt *ShAmt = dyn_cast<ConstantUInt>(LHSI->getOperand(1))) {
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switch (I.getOpcode()) {
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default: break;
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case Instruction::SetEQ:
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case Instruction::SetNE: {
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if (I.isEquality()) {
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// Check that the shift amount is in range. If not, don't perform
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// undefined shifts. When the shift is visited it will be
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// simplified.
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@ -4030,8 +4058,6 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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return new SetCondInst(I.getOpcode(), And,
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ConstantExpr::getShl(CI, ShAmt));
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}
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break;
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}
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}
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}
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break;
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@ -4130,8 +4156,7 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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}
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// Simplify seteq and setne instructions...
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if (I.getOpcode() == Instruction::SetEQ ||
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I.getOpcode() == Instruction::SetNE) {
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if (I.isEquality()) {
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bool isSetNE = I.getOpcode() == Instruction::SetNE;
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// If the first operand is (and|or|xor) with a constant, and the second
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@ -4361,9 +4386,7 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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if (CastInst *CI = dyn_cast<CastInst>(Op0)) {
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Value *CastOp0 = CI->getOperand(0);
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if (CastOp0->getType()->isLosslesslyConvertibleTo(CI->getType()) &&
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(isa<Constant>(Op1) || isa<CastInst>(Op1)) &&
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(I.getOpcode() == Instruction::SetEQ ||
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I.getOpcode() == Instruction::SetNE)) {
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(isa<Constant>(Op1) || isa<CastInst>(Op1)) && I.isEquality()) {
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// We keep moving the cast from the left operand over to the right
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// operand, where it can often be eliminated completely.
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Op0 = CastOp0;
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@ -4398,8 +4421,7 @@ Instruction *InstCombiner::visitSetCondInst(SetCondInst &I) {
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return R;
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}
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if (I.getOpcode() == Instruction::SetNE ||
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I.getOpcode() == Instruction::SetEQ) {
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if (I.isEquality()) {
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Value *A, *B;
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if (match(Op0, m_Xor(m_Value(A), m_Value(B))) &&
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(A == Op1 || B == Op1)) {
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@ -4552,7 +4574,7 @@ Instruction *InstCombiner::visitShiftInst(ShiftInst &I) {
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return R;
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// See if we can turn a signed shr into an unsigned shr.
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if (!isLeftShift && I.getType()->isSigned()) {
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if (I.isArithmeticShift()) {
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if (MaskedValueIsZero(Op0,
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1ULL << (I.getType()->getPrimitiveSizeInBits()-1))) {
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Value *V = InsertCastBefore(Op0, I.getType()->getUnsignedVersion(), I);
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@ -5617,10 +5639,8 @@ Instruction *InstCombiner::visitSelectInst(SelectInst &SI) {
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// non-constant value, eliminate this whole mess. This corresponds to
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// cases like this: ((X & 27) ? 27 : 0)
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if (TrueValC->isNullValue() || FalseValC->isNullValue())
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if (Instruction *IC = dyn_cast<Instruction>(SI.getCondition()))
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if ((IC->getOpcode() == Instruction::SetEQ ||
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IC->getOpcode() == Instruction::SetNE) &&
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isa<ConstantInt>(IC->getOperand(1)) &&
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if (SetCondInst *IC = dyn_cast<SetCondInst>(SI.getCondition()))
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if (IC->isEquality() && isa<ConstantInt>(IC->getOperand(1)) &&
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cast<Constant>(IC->getOperand(1))->isNullValue())
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if (Instruction *ICA = dyn_cast<Instruction>(IC->getOperand(0)))
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if (ICA->getOpcode() == Instruction::And &&
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