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Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sandeep Patel 2009-09-02 08:44:58 +00:00
parent 25f1992cf5
commit 65c3c8f323
43 changed files with 214 additions and 181 deletions
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7
include/llvm/CodeGen/CallingConvLower.h
View File

@ -18,6 +18,7 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CallingConv.h"
namespace llvm {
class TargetRegisterInfo;
@ -142,7 +143,7 @@ typedef bool CCCustomFn(unsigned &ValNo, EVT &ValVT,
/// return values. It captures which registers are already assigned and which
/// stack slots are used. It provides accessors to allocate these values.
class CCState {
unsigned CallingConv;
CallingConv::ID CallingConv;
bool IsVarArg;
const TargetMachine &TM;
const TargetRegisterInfo &TRI;
@ -152,7 +153,7 @@ class CCState {
unsigned StackOffset;
SmallVector<uint32_t, 16> UsedRegs;
public:
CCState(unsigned CC, bool isVarArg, const TargetMachine &TM,
CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &TM,
SmallVector<CCValAssign, 16> &locs, LLVMContext &C);
void addLoc(const CCValAssign &V) {
@ -161,7 +162,7 @@ public:
LLVMContext &getContext() const { return Context; }
const TargetMachine &getTarget() const { return TM; }
unsigned getCallingConv() const { return CallingConv; }
CallingConv::ID getCallingConv() const { return CallingConv; }
bool isVarArg() const { return IsVarArg; }
unsigned getNextStackOffset() const { return StackOffset; }

13
include/llvm/Function.h
View File

@ -19,6 +19,7 @@
#define LLVM_FUNCTION_H
#include "llvm/GlobalValue.h"
#include "llvm/CallingConv.h"
#include "llvm/BasicBlock.h"
#include "llvm/Argument.h"
#include "llvm/Attributes.h"
@ -86,7 +87,7 @@ private:
AttrListPtr AttributeList; ///< Parameter attributes
// The Calling Convention is stored in Value::SubclassData.
/*unsigned CallingConvention;*/
/*CallingConv::ID CallingConvention;*/
friend class SymbolTableListTraits<Function, Module>;
@ -150,12 +151,14 @@ public:
unsigned getIntrinsicID() const;
bool isIntrinsic() const { return getIntrinsicID() != 0; }
/// getCallingConv()/setCallingConv(uint) - These method get and set the
/// getCallingConv()/setCallingConv(CC) - These method get and set the
/// calling convention of this function. The enum values for the known
/// calling conventions are defined in CallingConv.h.
unsigned getCallingConv() const { return SubclassData >> 1; }
void setCallingConv(unsigned CC) {
SubclassData = (SubclassData & 1) | (CC << 1);
CallingConv::ID getCallingConv() const {
return static_cast<CallingConv::ID>(SubclassData >> 1);
}
void setCallingConv(CallingConv::ID CC) {
SubclassData = (SubclassData & 1) | (static_cast<unsigned>(CC) << 1);
}
/// getAttributes - Return the attribute list for this Function.

17
include/llvm/Instructions.h
View File

@ -20,6 +20,7 @@
#include "llvm/DerivedTypes.h"
#include "llvm/Attributes.h"
#include "llvm/BasicBlock.h"
#include "llvm/CallingConv.h"
#include "llvm/LLVMContext.h"
#include "llvm/ADT/SmallVector.h"
#include <iterator>
@ -1042,9 +1043,11 @@ public:
/// getCallingConv/setCallingConv - Get or set the calling convention of this
/// function call.
unsigned getCallingConv() const { return SubclassData >> 1; }
void setCallingConv(unsigned CC) {
SubclassData = (SubclassData & 1) | (CC << 1);
CallingConv::ID getCallingConv() const {
return static_cast<CallingConv::ID>(SubclassData >> 1);
}
void setCallingConv(CallingConv::ID CC) {
SubclassData = (SubclassData & 1) | (static_cast<unsigned>(CC) << 1);
}
/// getAttributes - Return the parameter attributes for this call.
@ -2382,9 +2385,11 @@ public:
/// getCallingConv/setCallingConv - Get or set the calling convention of this
/// function call.
unsigned getCallingConv() const { return SubclassData; }
void setCallingConv(unsigned CC) {
SubclassData = CC;
CallingConv::ID getCallingConv() const {
return static_cast<CallingConv::ID>(SubclassData);
}
void setCallingConv(CallingConv::ID CC) {
SubclassData = static_cast<unsigned>(CC);
}
/// getAttributes - Return the parameter attributes for this invoke.

5
include/llvm/Support/CallSite.h
View File

@ -26,6 +26,7 @@
#include "llvm/Attributes.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/BasicBlock.h"
#include "llvm/CallingConv.h"
#include "llvm/Instruction.h"
namespace llvm {
@ -61,8 +62,8 @@ public:
/// getCallingConv/setCallingConv - get or set the calling convention of the
/// call.
unsigned getCallingConv() const;
void setCallingConv(unsigned CC);
CallingConv::ID getCallingConv() const;
void setCallingConv(CallingConv::ID CC);
/// getAttributes/setAttributes - get or set the parameter attributes of
/// the call.

13
include/llvm/Target/TargetLowering.h
View File

@ -1116,7 +1116,7 @@ public:
///
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {
@ -1147,8 +1147,9 @@ public:
std::pair<SDValue, SDValue>
LowerCallTo(SDValue Chain, const Type *RetTy, bool RetSExt, bool RetZExt,
bool isVarArg, bool isInreg, unsigned NumFixedArgs,
unsigned CallConv, bool isTailCall, bool isReturnValueUsed,
SDValue Callee, ArgListTy &Args, SelectionDAG &DAG, DebugLoc dl);
CallingConv::ID CallConv, bool isTailCall,
bool isReturnValueUsed, SDValue Callee, ArgListTy &Args,
SelectionDAG &DAG, DebugLoc dl);
/// LowerCall - This hook must be implemented to lower calls into the
/// the specified DAG. The outgoing arguments to the call are described
@ -1164,7 +1165,7 @@ public:
///
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -1179,7 +1180,7 @@ public:
/// value.
///
virtual SDValue
LowerReturn(SDValue Chain, unsigned CallConv, bool isVarArg,
LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {
assert(0 && "Not Implemented");
@ -1283,7 +1284,7 @@ public:
/// should override this function.
virtual bool
IsEligibleForTailCallOptimization(SDValue Callee,
unsigned CalleeCC,
CallingConv::ID CalleeCC,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
SelectionDAG& DAG) const {

23
lib/AsmParser/LLParser.cpp
View File

@ -998,7 +998,7 @@ bool LLParser::ParseOptionalVisibility(unsigned &Res) {
/// ::= 'arm_aapcs_vfpcc'
/// ::= 'cc' UINT
///
bool LLParser::ParseOptionalCallingConv(unsigned &CC) {
bool LLParser::ParseOptionalCallingConv(CallingConv::ID &CC) {
switch (Lex.getKind()) {
default: CC = CallingConv::C; return false;
case lltok::kw_ccc: CC = CallingConv::C; break;
@ -1009,8 +1009,18 @@ bool LLParser::ParseOptionalCallingConv(unsigned &CC) {
case lltok::kw_arm_apcscc: CC = CallingConv::ARM_APCS; break;
case lltok::kw_arm_aapcscc: CC = CallingConv::ARM_AAPCS; break;
case lltok::kw_arm_aapcs_vfpcc:CC = CallingConv::ARM_AAPCS_VFP; break;
case lltok::kw_cc: Lex.Lex(); return ParseUInt32(CC);
case lltok::kw_cc: {
unsigned ArbitraryCC;
Lex.Lex();
if (ParseUInt32(ArbitraryCC)) {
return true;
} else
CC = static_cast<CallingConv::ID>(ArbitraryCC);
return false;
}
break;
}
Lex.Lex();
return false;
}
@ -2357,7 +2367,8 @@ bool LLParser::ParseFunctionHeader(Function *&Fn, bool isDefine) {
LocTy LinkageLoc = Lex.getLoc();
unsigned Linkage;
unsigned Visibility, CC, RetAttrs;
unsigned Visibility, RetAttrs;
CallingConv::ID CC;
PATypeHolder RetType(Type::getVoidTy(Context));
LocTy RetTypeLoc = Lex.getLoc();
if (ParseOptionalLinkage(Linkage) ||
@ -2917,7 +2928,8 @@ bool LLParser::ParseSwitch(Instruction *&Inst, PerFunctionState &PFS) {
/// OptionalAttrs 'to' TypeAndValue 'unwind' TypeAndValue
bool LLParser::ParseInvoke(Instruction *&Inst, PerFunctionState &PFS) {
LocTy CallLoc = Lex.getLoc();
unsigned CC, RetAttrs, FnAttrs;
unsigned RetAttrs, FnAttrs;
CallingConv::ID CC;
PATypeHolder RetType(Type::getVoidTy(Context));
LocTy RetTypeLoc;
ValID CalleeID;
@ -3265,7 +3277,8 @@ bool LLParser::ParsePHI(Instruction *&Inst, PerFunctionState &PFS) {
/// ParameterList OptionalAttrs
bool LLParser::ParseCall(Instruction *&Inst, PerFunctionState &PFS,
bool isTail) {
unsigned CC, RetAttrs, FnAttrs;
unsigned RetAttrs, FnAttrs;
CallingConv::ID CC;
PATypeHolder RetType(Type::getVoidTy(Context));
LocTy RetTypeLoc;
ValID CalleeID;

2
lib/AsmParser/LLParser.h
View File

@ -126,7 +126,7 @@ namespace llvm {
bool HasLinkage; return ParseOptionalLinkage(Linkage, HasLinkage);
}
bool ParseOptionalVisibility(unsigned &Visibility);
bool ParseOptionalCallingConv(unsigned &CC);
bool ParseOptionalCallingConv(CallingConv::ID &CC);
bool ParseOptionalAlignment(unsigned &Alignment);
bool ParseOptionalCommaAlignment(unsigned &Alignment);
bool ParseIndexList(SmallVectorImpl<unsigned> &Indices);

8
lib/Bitcode/Reader/BitcodeReader.cpp
View File

@ -1417,7 +1417,7 @@ bool BitcodeReader::ParseModule(const std::string &ModuleID) {
Function *Func = Function::Create(FTy, GlobalValue::ExternalLinkage,
"", TheModule);
Func->setCallingConv(Record[1]);
Func->setCallingConv(static_cast<CallingConv::ID>(Record[1]));
bool isProto = Record[2];
Func->setLinkage(GetDecodedLinkage(Record[3]));
Func->setAttributes(getAttributes(Record[4]));
@ -1918,7 +1918,8 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
I = InvokeInst::Create(Callee, NormalBB, UnwindBB,
Ops.begin(), Ops.end());
cast<InvokeInst>(I)->setCallingConv(CCInfo);
cast<InvokeInst>(I)->setCallingConv(
static_cast<CallingConv::ID>(CCInfo));
cast<InvokeInst>(I)->setAttributes(PAL);
break;
}
@ -2056,7 +2057,8 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
}
I = CallInst::Create(Callee, Args.begin(), Args.end());
cast<CallInst>(I)->setCallingConv(CCInfo>>1);
cast<CallInst>(I)->setCallingConv(
static_cast<CallingConv::ID>(CCInfo>>1));
cast<CallInst>(I)->setTailCall(CCInfo & 1);
cast<CallInst>(I)->setAttributes(PAL);
break;

2
lib/CodeGen/SelectionDAG/CallingConvLower.cpp
View File

@ -20,7 +20,7 @@
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
CCState::CCState(unsigned CC, bool isVarArg, const TargetMachine &tm,
CCState::CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &tm,
SmallVector<CCValAssign, 16> &locs, LLVMContext &C)
: CallingConv(CC), IsVarArg(isVarArg), TM(tm),
TRI(*TM.getRegisterInfo()), Locs(locs), Context(C) {

5
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
View File

@ -989,7 +989,8 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
}
bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg();
unsigned CallConv = DAG.getMachineFunction().getFunction()->getCallingConv();
CallingConv::ID CallConv =
DAG.getMachineFunction().getFunction()->getCallingConv();
Chain = TLI.LowerReturn(Chain, CallConv, isVarArg,
Outs, getCurDebugLoc(), DAG);
@ -5613,7 +5614,7 @@ std::pair<SDValue, SDValue>
TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
bool RetSExt, bool RetZExt, bool isVarArg,
bool isInreg, unsigned NumFixedArgs,
unsigned CallConv, bool isTailCall,
CallingConv::ID CallConv, bool isTailCall,
bool isReturnValueUsed,
SDValue Callee,
ArgListTy &Args, SelectionDAG &DAG, DebugLoc dl) {

10
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -685,7 +685,7 @@ static bool RetCC_ARM_AAPCS_Custom_f64(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
/// CCAssignFnForNode - Selects the correct CCAssignFn for a the
/// given CallingConvention value.
CCAssignFn *ARMTargetLowering::CCAssignFnForNode(unsigned CC,
CCAssignFn *ARMTargetLowering::CCAssignFnForNode(CallingConv::ID CC,
bool Return,
bool isVarArg) const {
switch (CC) {
@ -715,7 +715,7 @@ CCAssignFn *ARMTargetLowering::CCAssignFnForNode(unsigned CC,
/// appropriate copies out of appropriate physical registers.
SDValue
ARMTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {
@ -846,7 +846,7 @@ void ARMTargetLowering::PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG,
/// nodes.
SDValue
ARMTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -1050,7 +1050,7 @@ ARMTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
SDValue
ARMTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {
@ -1550,7 +1550,7 @@ ARMTargetLowering::GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
SDValue
ARMTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,

10
lib/Target/ARM/ARMISelLowering.h
View File

@ -246,7 +246,7 @@ namespace llvm {
SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
SDValue &Root, SelectionDAG &DAG, DebugLoc dl);
CCAssignFn *CCAssignFnForNode(unsigned CC, bool Return, bool isVarArg) const;
CCAssignFn *CCAssignFnForNode(CallingConv::ID CC, bool Return, bool isVarArg) const;
SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg,
DebugLoc dl, SelectionDAG &DAG,
const CCValAssign &VA,
@ -273,21 +273,21 @@ namespace llvm {
const Value *DstSV, uint64_t DstSVOff,
const Value *SrcSV, uint64_t SrcSVOff);
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -296,7 +296,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);
};

8
lib/Target/Alpha/AlphaISelLowering.cpp
View File

@ -232,7 +232,7 @@ static SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) {
SDValue
AlphaTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -348,7 +348,7 @@ AlphaTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
///
SDValue
AlphaTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {
@ -390,7 +390,7 @@ AlphaTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
SDValue
AlphaTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -471,7 +471,7 @@ AlphaTargetLowering::LowerFormalArguments(SDValue Chain,
SDValue
AlphaTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {

8
lib/Target/Alpha/AlphaISelLowering.h
View File

@ -82,7 +82,7 @@ namespace llvm {
const char *getTargetNodeName(unsigned Opcode) const;
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
@ -108,14 +108,14 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -123,7 +123,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);
};

6
lib/Target/Blackfin/BlackfinISelLowering.cpp
View File

@ -161,7 +161,7 @@ SDValue BlackfinTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) {
SDValue
BlackfinTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -218,7 +218,7 @@ BlackfinTargetLowering::LowerFormalArguments(SDValue Chain,
SDValue
BlackfinTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {
@ -275,7 +275,7 @@ BlackfinTargetLowering::LowerReturn(SDValue Chain,
SDValue
BlackfinTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,

6
lib/Target/Blackfin/BlackfinISelLowering.h
View File

@ -58,13 +58,13 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -72,7 +72,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);
};

2
lib/Target/CBackend/CBackend.cpp
View File

@ -2283,6 +2283,8 @@ void CWriter::printFunctionSignature(const Function *F, bool Prototype) {
case CallingConv::X86_FastCall:
Out << "__attribute__((fastcall)) ";
break;
default:
break;
}
// Loop over the arguments, printing them...

6
lib/Target/CellSPU/SPUISelLowering.cpp
View File

@ -1015,7 +1015,7 @@ LowerConstantFP(SDValue Op, SelectionDAG &DAG) {
SDValue
SPUTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -1144,7 +1144,7 @@ static SDNode *isLSAAddress(SDValue Op, SelectionDAG &DAG) {
SDValue
SPUTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -1371,7 +1371,7 @@ SPUTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
SDValue
SPUTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {

6
lib/Target/CellSPU/SPUISelLowering.h
View File

@ -150,14 +150,14 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -166,7 +166,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);
};

4
lib/Target/CppBackend/CPPBackend.cpp
View File

@ -123,7 +123,7 @@ namespace {
private:
void printLinkageType(GlobalValue::LinkageTypes LT);
void printVisibilityType(GlobalValue::VisibilityTypes VisTypes);
void printCallingConv(unsigned cc);
void printCallingConv(CallingConv::ID cc);
void printEscapedString(const std::string& str);
void printCFP(const ConstantFP* CFP);
@ -268,7 +268,7 @@ namespace {
Out << ")";
}
void CppWriter::printCallingConv(unsigned cc){
void CppWriter::printCallingConv(CallingConv::ID cc){
// Print the calling convention.
switch (cc) {
case CallingConv::C: Out << "CallingConv::C"; break;

6
lib/Target/MSIL/MSILWriter.cpp
View File

@ -270,7 +270,7 @@ std::string MSILWriter::getLabelName(const Value* V) {
}
std::string MSILWriter::getConvModopt(unsigned CallingConvID) {
std::string MSILWriter::getConvModopt(CallingConv::ID CallingConvID) {
switch (CallingConvID) {
case CallingConv::C:
case CallingConv::Cold:
@ -1623,13 +1623,13 @@ const char* MSILWriter::getLibraryName(const Function* F) {
const char* MSILWriter::getLibraryName(const GlobalVariable* GV) {
return getLibraryForSymbol(Mang->getMangledName(GV), false, 0);
return getLibraryForSymbol(Mang->getMangledName(GV), false, CallingConv::C);
}
const char* MSILWriter::getLibraryForSymbol(const StringRef &Name,
bool isFunction,
unsigned CallingConv) {
CallingConv::ID CallingConv) {
// TODO: Read *.def file with function and libraries definitions.
return "MSVCRT.DLL";
}

5
lib/Target/MSIL/MSILWriter.h
View File

@ -13,6 +13,7 @@
#ifndef MSILWRITER_H
#define MSILWRITER_H
#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
#include "llvm/Module.h"
#include "llvm/Instructions.h"
@ -133,7 +134,7 @@ namespace llvm {
std::string getLabelName(const std::string& Name);
std::string getConvModopt(unsigned CallingConvID);
std::string getConvModopt(CallingConv::ID CallingConvID);
std::string getArrayTypeName(Type::TypeID TyID, const Type* Ty);
@ -248,7 +249,7 @@ namespace llvm {
const char* getLibraryName(const GlobalVariable* GV);
const char* getLibraryForSymbol(const StringRef &Name, bool isFunction,
unsigned CallingConv);
CallingConv::ID CallingConv);
void printExternals();
};

12
lib/Target/MSP430/MSP430ISelLowering.cpp
View File

@ -196,7 +196,7 @@ getRegForInlineAsmConstraint(const std::string &Constraint,
SDValue
MSP430TargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
@ -215,7 +215,7 @@ MSP430TargetLowering::LowerFormalArguments(SDValue Chain,
SDValue
MSP430TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -238,7 +238,7 @@ MSP430TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// FIXME: varargs
SDValue
MSP430TargetLowering::LowerCCCArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
@ -318,7 +318,7 @@ MSP430TargetLowering::LowerCCCArguments(SDValue Chain,
SDValue
MSP430TargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {
@ -367,7 +367,7 @@ MSP430TargetLowering::LowerReturn(SDValue Chain,
/// TODO: sret.
SDValue
MSP430TargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg>
&Outs,
@ -493,7 +493,7 @@ MSP430TargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
///
SDValue
MSP430TargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {

12
lib/Target/MSP430/MSP430ISelLowering.h
View File

@ -94,7 +94,7 @@ namespace llvm {
private:
SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -102,7 +102,7 @@ namespace llvm {
SmallVectorImpl<SDValue> &InVals);
SDValue LowerCCCArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl,
@ -110,20 +110,20 @@ namespace llvm {
SmallVectorImpl<SDValue> &InVals);
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -131,7 +131,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);

8
lib/Target/Mips/MipsISelLowering.cpp
View File

@ -683,7 +683,7 @@ static bool CC_MipsO32(unsigned ValNo, EVT ValVT,
/// TODO: isVarArg, isTailCall.
SDValue
MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -874,7 +874,7 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
/// appropriate copies out of appropriate physical registers.
SDValue
MipsTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {
@ -907,7 +907,7 @@ MipsTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
/// TODO: isVarArg
SDValue
MipsTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -1056,7 +1056,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
SDValue
MipsTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {

8
lib/Target/Mips/MipsISelLowering.h
View File

@ -91,7 +91,7 @@ namespace llvm {
// Lower Operand helpers
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
@ -110,14 +110,14 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -126,7 +126,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);

6
lib/Target/PIC16/PIC16ISelLowering.cpp
View File

@ -1255,7 +1255,7 @@ LowerDirectCallReturn(SDValue RetLabel, SDValue Chain, SDValue InFlag,
SDValue
PIC16TargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {
@ -1347,7 +1347,7 @@ GetDataAddress(DebugLoc dl, SDValue Callee, SDValue &Chain,
SDValue
PIC16TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -1603,7 +1603,7 @@ void PIC16TargetLowering::InitReservedFrameCount(const Function *F) {
SDValue
PIC16TargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl,

6
lib/Target/PIC16/PIC16ISelLowering.h
View File

@ -132,7 +132,7 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -140,7 +140,7 @@ namespace llvm {
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -148,7 +148,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);

24
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -1484,7 +1484,7 @@ static unsigned CalculateStackSlotSize(EVT ArgVT, ISD::ArgFlagsTy Flags,
SDValue
PPCTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -1501,7 +1501,7 @@ PPCTargetLowering::LowerFormalArguments(SDValue Chain,
SDValue
PPCTargetLowering::LowerFormalArguments_SVR4(
SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -1728,7 +1728,7 @@ PPCTargetLowering::LowerFormalArguments_SVR4(
SDValue
PPCTargetLowering::LowerFormalArguments_Darwin(
SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -2164,7 +2164,7 @@ static int CalculateTailCallSPDiff(SelectionDAG& DAG, bool IsTailCall,
/// optimization should implement this function.
bool
PPCTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
unsigned CalleeCC,
CallingConv::ID CalleeCC,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
SelectionDAG& DAG) const {
@ -2173,7 +2173,7 @@ PPCTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
return false;
MachineFunction &MF = DAG.getMachineFunction();
unsigned CallerCC = MF.getFunction()->getCallingConv();
CallingConv::ID CallerCC = MF.getFunction()->getCallingConv();
if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) {
// Functions containing by val parameters are not supported.
for (unsigned i = 0; i != Ins.size(); i++) {
@ -2453,7 +2453,7 @@ unsigned PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag,
SDValue
PPCTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {
@ -2478,8 +2478,8 @@ PPCTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
}
SDValue
PPCTargetLowering::FinishCall(unsigned CallConv, DebugLoc dl, bool isTailCall,
bool isVarArg,
PPCTargetLowering::FinishCall(CallingConv::ID CallConv, DebugLoc dl,
bool isTailCall, bool isVarArg,
SelectionDAG &DAG,
SmallVector<std::pair<unsigned, SDValue>, 8>
&RegsToPass,
@ -2554,7 +2554,7 @@ PPCTargetLowering::FinishCall(unsigned CallConv, DebugLoc dl, bool isTailCall,
SDValue
PPCTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -2573,7 +2573,7 @@ PPCTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
SDValue
PPCTargetLowering::LowerCall_SVR4(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -2782,7 +2782,7 @@ PPCTargetLowering::LowerCall_SVR4(SDValue Chain, SDValue Callee,
SDValue
PPCTargetLowering::LowerCall_Darwin(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -3116,7 +3116,7 @@ PPCTargetLowering::LowerCall_Darwin(SDValue Chain, SDValue Callee,
SDValue
PPCTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {

20
lib/Target/PowerPC/PPCISelLowering.h
View File

@ -332,7 +332,7 @@ namespace llvm {
virtual bool
IsEligibleForTailCallOptimization(SDValue Callee,
unsigned CalleeCC,
CallingConv::ID CalleeCC,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
SelectionDAG& DAG) const;
@ -391,11 +391,11 @@ namespace llvm {
SDValue LowerMUL(SDValue Op, SelectionDAG &DAG);
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
SDValue FinishCall(unsigned CallConv, DebugLoc dl, bool isTailCall,
SDValue FinishCall(CallingConv::ID CallConv, DebugLoc dl, bool isTailCall,
bool isVarArg,
SelectionDAG &DAG,
SmallVector<std::pair<unsigned, SDValue>, 8>
@ -408,14 +408,14 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -423,33 +423,33 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);
SDValue
LowerFormalArguments_Darwin(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
SDValue
LowerFormalArguments_SVR4(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
SDValue
LowerCall_Darwin(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
SDValue
LowerCall_SVR4(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,

6
lib/Target/Sparc/SparcISelLowering.cpp
View File

@ -35,7 +35,7 @@ using namespace llvm;
SDValue
SparcTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {
@ -81,7 +81,7 @@ SparcTargetLowering::LowerReturn(SDValue Chain,
/// pass FP values in FP registers for fastcc functions.
SDValue
SparcTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -246,7 +246,7 @@ SparcTargetLowering::LowerFormalArguments(SDValue Chain,
SDValue
SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,

6
lib/Target/Sparc/SparcISelLowering.h
View File

@ -76,7 +76,7 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -84,7 +84,7 @@ namespace llvm {
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -93,7 +93,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);
};

12
lib/Target/SystemZ/SystemZISelLowering.cpp
View File

@ -217,7 +217,7 @@ getRegForInlineAsmConstraint(const std::string &Constraint,
SDValue
SystemZTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
@ -236,7 +236,7 @@ SystemZTargetLowering::LowerFormalArguments(SDValue Chain,
SDValue
SystemZTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -259,7 +259,7 @@ SystemZTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// FIXME: varargs
SDValue
SystemZTargetLowering::LowerCCCArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
@ -349,7 +349,7 @@ SystemZTargetLowering::LowerCCCArguments(SDValue Chain,
/// TODO: sret.
SDValue
SystemZTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg>
&Outs,
@ -484,7 +484,7 @@ SystemZTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
///
SDValue
SystemZTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -528,7 +528,7 @@ SystemZTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
SDValue
SystemZTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {

12
lib/Target/SystemZ/SystemZISelLowering.h
View File

@ -90,7 +90,7 @@ namespace llvm {
private:
SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -98,7 +98,7 @@ namespace llvm {
SmallVectorImpl<SDValue> &InVals);
SDValue LowerCCCArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl,
@ -106,20 +106,20 @@ namespace llvm {
SmallVectorImpl<SDValue> &InVals);
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -127,7 +127,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);

4
lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
View File

@ -126,7 +126,7 @@ void X86ATTAsmPrinter::DecorateCygMingName(std::string &Name,
CygMingStubs.insert(Name);
// We don't want to decorate non-stdcall or non-fastcall functions right now
unsigned CC = F->getCallingConv();
CallingConv::ID CC = F->getCallingConv();
if (CC != CallingConv::X86_StdCall && CC != CallingConv::X86_FastCall)
return;
@ -237,7 +237,7 @@ void X86ATTAsmPrinter::emitFunctionHeader(const MachineFunction &MF) {
bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
const Function *F = MF.getFunction();
this->MF = &MF;
unsigned CC = F->getCallingConv();
CallingConv::ID CC = F->getCallingConv();
SetupMachineFunction(MF);
O << "\n\n";

4
lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
View File

@ -79,7 +79,7 @@ void X86IntelAsmPrinter::decorateName(std::string &Name,
if (!F) return;
// We don't want to decorate non-stdcall or non-fastcall functions right now
unsigned CC = F->getCallingConv();
CallingConv::ID CC = F->getCallingConv();
if (CC != CallingConv::X86_StdCall && CC != CallingConv::X86_FastCall)
return;
@ -134,7 +134,7 @@ bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
// Print out labels for the function.
const Function *F = MF.getFunction();
unsigned CC = F->getCallingConv();
CallingConv::ID CC = F->getCallingConv();
unsigned FnAlign = MF.getAlignment();
// Populate function information map. Actually, We don't want to populate

7
lib/Target/X86/X86FastISel.cpp
View File

@ -118,7 +118,7 @@ private:
bool X86VisitIntrinsicCall(IntrinsicInst &I);
bool X86SelectCall(Instruction *I);
CCAssignFn *CCAssignFnForCall(unsigned CC, bool isTailCall = false);
CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool isTailCall = false);
const X86InstrInfo *getInstrInfo() const {
return getTargetMachine()->getInstrInfo();
@ -169,7 +169,8 @@ bool X86FastISel::isTypeLegal(const Type *Ty, EVT &VT, bool AllowI1) {
/// CCAssignFnForCall - Selects the correct CCAssignFn for a given calling
/// convention.
CCAssignFn *X86FastISel::CCAssignFnForCall(unsigned CC, bool isTaillCall) {
CCAssignFn *X86FastISel::CCAssignFnForCall(CallingConv::ID CC,
bool isTaillCall) {
if (Subtarget->is64Bit()) {
if (Subtarget->isTargetWin64())
return CC_X86_Win64_C;
@ -1223,7 +1224,7 @@ bool X86FastISel::X86SelectCall(Instruction *I) {
// Handle only C and fastcc calling conventions for now.
CallSite CS(CI);
unsigned CC = CS.getCallingConv();
CallingConv::ID CC = CS.getCallingConv();
if (CC != CallingConv::C &&
CC != CallingConv::Fast &&
CC != CallingConv::X86_FastCall)

23
lib/Target/X86/X86ISelLowering.cpp
View File

@ -1063,7 +1063,7 @@ unsigned X86TargetLowering::getFunctionAlignment(const Function *F) const {
SDValue
X86TargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {
@ -1155,7 +1155,7 @@ X86TargetLowering::LowerReturn(SDValue Chain,
///
SDValue
X86TargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {
@ -1255,7 +1255,7 @@ ArgsAreStructReturn(const SmallVectorImpl<ISD::InputArg> &Ins) {
/// IsCalleePop - Determines whether the callee is required to pop its
/// own arguments. Callee pop is necessary to support tail calls.
bool X86TargetLowering::IsCalleePop(bool IsVarArg, unsigned CallingConv) {
bool X86TargetLowering::IsCalleePop(bool IsVarArg, CallingConv::ID CallingConv){
if (IsVarArg)
return false;
@ -1273,7 +1273,7 @@ bool X86TargetLowering::IsCalleePop(bool IsVarArg, unsigned CallingConv) {
/// CCAssignFnForNode - Selects the correct CCAssignFn for a the
/// given CallingConvention value.
CCAssignFn *X86TargetLowering::CCAssignFnForNode(unsigned CC) const {
CCAssignFn *X86TargetLowering::CCAssignFnForNode(CallingConv::ID CC) const {
if (Subtarget->is64Bit()) {
if (Subtarget->isTargetWin64())
return CC_X86_Win64_C;
@ -1292,7 +1292,7 @@ CCAssignFn *X86TargetLowering::CCAssignFnForNode(unsigned CC) const {
/// NameDecorationForCallConv - Selects the appropriate decoration to
/// apply to a MachineFunction containing a given calling convention.
NameDecorationStyle
X86TargetLowering::NameDecorationForCallConv(unsigned CallConv) {
X86TargetLowering::NameDecorationForCallConv(CallingConv::ID CallConv) {
if (CallConv == CallingConv::X86_FastCall)
return FastCall;
else if (CallConv == CallingConv::X86_StdCall)
@ -1316,7 +1316,7 @@ CreateCopyOfByValArgument(SDValue Src, SDValue Dst, SDValue Chain,
SDValue
X86TargetLowering::LowerMemArgument(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
const CCValAssign &VA,
@ -1351,7 +1351,7 @@ X86TargetLowering::LowerMemArgument(SDValue Chain,
SDValue
X86TargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl,
@ -1652,7 +1652,8 @@ EmitTailCallStoreRetAddr(SelectionDAG & DAG, MachineFunction &MF,
SDValue
X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -2097,12 +2098,12 @@ unsigned X86TargetLowering::GetAlignedArgumentStackSize(unsigned StackSize,
/// optimization should implement this function.
bool
X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
unsigned CalleeCC,
CallingConv::ID CalleeCC,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
SelectionDAG& DAG) const {
MachineFunction &MF = DAG.getMachineFunction();
unsigned CallerCC = MF.getFunction()->getCallingConv();
CallingConv::ID CallerCC = MF.getFunction()->getCallingConv();
return CalleeCC == CallingConv::Fast && CallerCC == CalleeCC;
}
@ -6476,7 +6477,7 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
} else {
const Function *Func =
cast<Function>(cast<SrcValueSDNode>(Op.getOperand(5))->getValue());
unsigned CC = Func->getCallingConv();
CallingConv::ID CC = Func->getCallingConv();
unsigned NestReg;
switch (CC) {

18
lib/Target/X86/X86ISelLowering.h
View File

@ -521,7 +521,7 @@ namespace llvm {
/// optimization should implement this function.
virtual bool
IsEligibleForTailCallOptimization(SDValue Callee,
unsigned CalleeCC,
CallingConv::ID CalleeCC,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
SelectionDAG& DAG) const;
@ -578,12 +578,12 @@ namespace llvm {
bool X86ScalarSSEf64;
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
SDValue LowerMemArgument(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
const SmallVectorImpl<ISD::InputArg> &ArgInfo,
DebugLoc dl, SelectionDAG &DAG,
const CCValAssign &VA, MachineFrameInfo *MFI,
@ -594,13 +594,13 @@ namespace llvm {
ISD::ArgFlagsTy Flags);
// Call lowering helpers.
bool IsCalleePop(bool isVarArg, unsigned CallConv);
bool IsCalleePop(bool isVarArg, CallingConv::ID CallConv);
SDValue EmitTailCallLoadRetAddr(SelectionDAG &DAG, SDValue &OutRetAddr,
SDValue Chain, bool IsTailCall, bool Is64Bit,
int FPDiff, DebugLoc dl);
CCAssignFn *CCAssignFnForNode(unsigned CallConv) const;
NameDecorationStyle NameDecorationForCallConv(unsigned CallConv);
CCAssignFn *CCAssignFnForNode(CallingConv::ID CallConv) const;
NameDecorationStyle NameDecorationForCallConv(CallingConv::ID CallConv);
unsigned GetAlignedArgumentStackSize(unsigned StackSize, SelectionDAG &DAG);
std::pair<SDValue,SDValue> FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
@ -659,13 +659,13 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg, bool isTailCall,
CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -673,7 +673,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);

12
lib/Target/XCore/XCoreISelLowering.cpp
View File

@ -611,7 +611,7 @@ SDValue XCoreTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
/// XCore call implementation
SDValue
XCoreTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -636,7 +636,7 @@ XCoreTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
/// TODO: isTailCall, sret.
SDValue
XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -761,7 +761,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
/// appropriate copies out of appropriate physical registers.
SDValue
XCoreTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {
@ -791,7 +791,7 @@ XCoreTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
/// XCore formal arguments implementation
SDValue
XCoreTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl,
@ -814,7 +814,7 @@ XCoreTargetLowering::LowerFormalArguments(SDValue Chain,
/// TODO: sret
SDValue
XCoreTargetLowering::LowerCCCArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
@ -928,7 +928,7 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain,
SDValue
XCoreTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {

12
lib/Target/XCore/XCoreISelLowering.h
View File

@ -93,20 +93,20 @@ namespace llvm {
// Lower Operand helpers
SDValue LowerCCCArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals);
@ -138,7 +138,7 @@ namespace llvm {
virtual SDValue
LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@ -146,7 +146,7 @@ namespace llvm {
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@ -155,7 +155,7 @@ namespace llvm {
virtual SDValue
LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG);
};

7
lib/VMCore/Core.cpp
View File

@ -1118,7 +1118,8 @@ unsigned LLVMGetFunctionCallConv(LLVMValueRef Fn) {
}
void LLVMSetFunctionCallConv(LLVMValueRef Fn, unsigned CC) {
return unwrap<Function>(Fn)->setCallingConv(CC);
return unwrap<Function>(Fn)->setCallingConv(
static_cast<CallingConv::ID>(CC));
}
const char *LLVMGetGC(LLVMValueRef Fn) {
@ -1362,9 +1363,9 @@ unsigned LLVMGetInstructionCallConv(LLVMValueRef Instr) {
void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC) {
Value *V = unwrap(Instr);
if (CallInst *CI = dyn_cast<CallInst>(V))
return CI->setCallingConv(CC);
return CI->setCallingConv(static_cast<CallingConv::ID>(CC));
else if (InvokeInst *II = dyn_cast<InvokeInst>(V))
return II->setCallingConv(CC);
return II->setCallingConv(static_cast<CallingConv::ID>(CC));
llvm_unreachable("LLVMSetInstructionCallConv applies only to call and invoke!");
}

4
lib/VMCore/Instructions.cpp
View File

@ -45,10 +45,10 @@ CallSite::CallSite(Instruction *C) {
I.setPointer(C);
I.setInt(isa<CallInst>(C));
}
unsigned CallSite::getCallingConv() const {
CallingConv::ID CallSite::getCallingConv() const {
CALLSITE_DELEGATE_GETTER(getCallingConv());
}
void CallSite::setCallingConv(unsigned CC) {
void CallSite::setCallingConv(CallingConv::ID CC) {
CALLSITE_DELEGATE_SETTER(setCallingConv(CC));
}
const AttrListPtr &CallSite::getAttributes() const {