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[x86] specify triple and auto-generate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305654 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,44 +1,70 @@
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; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse4.2 | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
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define void @update(<3 x i8>* %dst, <3 x i8>* %src, i32 %n) nounwind {
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; CHECK-LABEL: update:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: subl $12, %esp
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; CHECK-NEXT: movl $0, (%esp)
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; CHECK-NEXT: movdqa {{.*#+}} xmm0 = <1,1,1,u>
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
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; CHECK-NEXT: jmp .LBB0_1
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .LBB0_2: # %forbody
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; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: pmovzxbd {{.*#+}} xmm2 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
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; CHECK-NEXT: paddd %xmm0, %xmm2
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; CHECK-NEXT: pextrb $8, %xmm2, 2(%ecx,%eax,4)
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; CHECK-NEXT: pshufb %xmm1, %xmm2
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; CHECK-NEXT: pextrw $0, %xmm2, (%ecx,%eax,4)
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; CHECK-NEXT: incl (%esp)
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; CHECK-NEXT: .LBB0_1: # %forcond
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: jl .LBB0_2
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; CHECK-NEXT: # BB#3: # %afterfor
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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entry:
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; CHECK-NOT: pextrw
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; CHECK: add
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%dst.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2]
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%src.addr = alloca <3 x i8>* ; <<3 x i8>**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%i = alloca i32, align 4 ; <i32*> [#uses=6]
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%dst.addr = alloca <3 x i8>*
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%src.addr = alloca <3 x i8>*
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%n.addr = alloca i32
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%i = alloca i32, align 4
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store <3 x i8>* %dst, <3 x i8>** %dst.addr
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store <3 x i8>* %src, <3 x i8>** %src.addr
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store i32 %n, i32* %n.addr
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32, i32* %i ; <i32> [#uses=1]
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%tmp1 = load i32, i32* %n.addr ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
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forcond:
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%tmp = load i32, i32* %i
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%tmp1 = load i32, i32* %n.addr
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%cmp = icmp slt i32 %tmp, %tmp1
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp2 = load i32, i32* %i ; <i32> [#uses=1]
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%tmp3 = load <3 x i8>*, <3 x i8>** %dst.addr ; <<3 x i8>*> [#uses=1]
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%arrayidx = getelementptr <3 x i8>, <3 x i8>* %tmp3, i32 %tmp2 ; <<3 x i8>*> [#uses=1]
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%tmp4 = load i32, i32* %i ; <i32> [#uses=1]
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%tmp5 = load <3 x i8>*, <3 x i8>** %src.addr ; <<3 x i8>*> [#uses=1]
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%arrayidx6 = getelementptr <3 x i8>, <3 x i8>* %tmp5, i32 %tmp4 ; <<3 x i8>*> [#uses=1]
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%tmp7 = load <3 x i8>, <3 x i8>* %arrayidx6 ; <<3 x i8>> [#uses=1]
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%add = add <3 x i8> %tmp7, < i8 1, i8 1, i8 1 > ; <<3 x i8>> [#uses=1]
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forbody:
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%tmp2 = load i32, i32* %i
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%tmp3 = load <3 x i8>*, <3 x i8>** %dst.addr
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%arrayidx = getelementptr <3 x i8>, <3 x i8>* %tmp3, i32 %tmp2
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%tmp4 = load i32, i32* %i
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%tmp5 = load <3 x i8>*, <3 x i8>** %src.addr
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%arrayidx6 = getelementptr <3 x i8>, <3 x i8>* %tmp5, i32 %tmp4
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%tmp7 = load <3 x i8>, <3 x i8>* %arrayidx6
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%add = add <3 x i8> %tmp7, < i8 1, i8 1, i8 1 >
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store <3 x i8> %add, <3 x i8>* %arrayidx
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br label %forinc
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forinc: ; preds = %forbody
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%tmp8 = load i32, i32* %i ; <i32> [#uses=1]
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%inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
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forinc:
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%tmp8 = load i32, i32* %i
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%inc = add i32 %tmp8, 1
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store i32 %inc, i32* %i
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br label %forcond
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afterfor: ; preds = %forcond
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afterfor:
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ret void
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}
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@ -1,59 +1,93 @@
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; RUN: llc < %s -march=x86 -mattr=+sse4.2 | FileCheck %s
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; CHECK: padd
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; CHECK: pand
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
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; widen v8i8 to v16i8 (checks even power of 2 widening with add & and)
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define void @update(i64* %dst_i, i64* %src_i, i32 %n) nounwind {
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; CHECK-LABEL: update:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: subl $12, %esp
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; CHECK-NEXT: movl $0, (%esp)
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; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1,1,1,1,1]
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [4,4,4,4,4,4,4,4]
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; CHECK-NEXT: movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; CHECK-NEXT: jmp .LBB0_1
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .LBB0_2: # %forbody
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; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: shll $3, %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: shll $3, %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl (%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: pmovzxbw {{.*#+}} xmm3 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
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; CHECK-NEXT: paddw %xmm0, %xmm3
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; CHECK-NEXT: pand %xmm1, %xmm3
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; CHECK-NEXT: pshufb %xmm2, %xmm3
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; CHECK-NEXT: movq %xmm3, (%edx,%ecx,8)
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; CHECK-NEXT: incl (%esp)
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; CHECK-NEXT: .LBB0_1: # %forcond
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: jl .LBB0_2
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; CHECK-NEXT: # BB#3: # %afterfor
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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entry:
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%dst_i.addr = alloca i64* ; <i64**> [#uses=2]
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%src_i.addr = alloca i64* ; <i64**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%i = alloca i32, align 4 ; <i32*> [#uses=8]
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%dst = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
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%src = alloca <8 x i8>*, align 4 ; <<8 x i8>**> [#uses=2]
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%dst_i.addr = alloca i64*
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%src_i.addr = alloca i64*
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%n.addr = alloca i32
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%i = alloca i32, align 4
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%dst = alloca <8 x i8>*, align 4
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%src = alloca <8 x i8>*, align 4
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store i64* %dst_i, i64** %dst_i.addr
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store i64* %src_i, i64** %src_i.addr
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store i32 %n, i32* %n.addr
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32, i32* %i ; <i32> [#uses=1]
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%tmp1 = load i32, i32* %n.addr ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
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forcond:
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%tmp = load i32, i32* %i
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%tmp1 = load i32, i32* %n.addr
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%cmp = icmp slt i32 %tmp, %tmp1
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp2 = load i32, i32* %i ; <i32> [#uses=1]
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%tmp3 = load i64*, i64** %dst_i.addr ; <i64*> [#uses=1]
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%arrayidx = getelementptr i64, i64* %tmp3, i32 %tmp2 ; <i64*> [#uses=1]
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%conv = bitcast i64* %arrayidx to <8 x i8>* ; <<8 x i8>*> [#uses=1]
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forbody:
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%tmp2 = load i32, i32* %i
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%tmp3 = load i64*, i64** %dst_i.addr
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%arrayidx = getelementptr i64, i64* %tmp3, i32 %tmp2
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%conv = bitcast i64* %arrayidx to <8 x i8>*
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store <8 x i8>* %conv, <8 x i8>** %dst
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%tmp4 = load i32, i32* %i ; <i32> [#uses=1]
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%tmp5 = load i64*, i64** %src_i.addr ; <i64*> [#uses=1]
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%arrayidx6 = getelementptr i64, i64* %tmp5, i32 %tmp4 ; <i64*> [#uses=1]
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%conv7 = bitcast i64* %arrayidx6 to <8 x i8>* ; <<8 x i8>*> [#uses=1]
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%tmp4 = load i32, i32* %i
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%tmp5 = load i64*, i64** %src_i.addr
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%arrayidx6 = getelementptr i64, i64* %tmp5, i32 %tmp4
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%conv7 = bitcast i64* %arrayidx6 to <8 x i8>*
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store <8 x i8>* %conv7, <8 x i8>** %src
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%tmp8 = load i32, i32* %i ; <i32> [#uses=1]
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%tmp9 = load <8 x i8>*, <8 x i8>** %dst ; <<8 x i8>*> [#uses=1]
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%arrayidx10 = getelementptr <8 x i8>, <8 x i8>* %tmp9, i32 %tmp8 ; <<8 x i8>*> [#uses=1]
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%tmp11 = load i32, i32* %i ; <i32> [#uses=1]
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%tmp12 = load <8 x i8>*, <8 x i8>** %src ; <<8 x i8>*> [#uses=1]
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%arrayidx13 = getelementptr <8 x i8>, <8 x i8>* %tmp12, i32 %tmp11 ; <<8 x i8>*> [#uses=1]
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%tmp14 = load <8 x i8>, <8 x i8>* %arrayidx13 ; <<8 x i8>> [#uses=1]
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%add = add <8 x i8> %tmp14, < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 > ; <<8 x i8>> [#uses=1]
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%and = and <8 x i8> %add, < i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4 > ; <<8 x i8>> [#uses=1]
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%tmp8 = load i32, i32* %i
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%tmp9 = load <8 x i8>*, <8 x i8>** %dst
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%arrayidx10 = getelementptr <8 x i8>, <8 x i8>* %tmp9, i32 %tmp8
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%tmp11 = load i32, i32* %i
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%tmp12 = load <8 x i8>*, <8 x i8>** %src
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%arrayidx13 = getelementptr <8 x i8>, <8 x i8>* %tmp12, i32 %tmp11
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%tmp14 = load <8 x i8>, <8 x i8>* %arrayidx13
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%add = add <8 x i8> %tmp14, < i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1 >
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%and = and <8 x i8> %add, < i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4 >
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store <8 x i8> %and, <8 x i8>* %arrayidx10
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br label %forinc
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forinc: ; preds = %forbody
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%tmp15 = load i32, i32* %i ; <i32> [#uses=1]
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%inc = add i32 %tmp15, 1 ; <i32> [#uses=1]
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forinc:
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%tmp15 = load i32, i32* %i
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%inc = add i32 %tmp15, 1
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store i32 %inc, i32* %i
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br label %forcond
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afterfor: ; preds = %forcond
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afterfor:
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ret void
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}
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@ -1,18 +1,54 @@
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; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse4.2 -post-RA-scheduler=true | FileCheck %s
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; CHECK: paddd
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 -post-RA-scheduler=true | FileCheck %s
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; Widen a v3i16 to v8i16 to do a vector add
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@.str = internal constant [4 x i8] c"%d \00" ; <[4 x i8]*> [#uses=1]
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@.str1 = internal constant [2 x i8] c"\0A\00" ; <[2 x i8]*> [#uses=1]
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@.str = internal constant [4 x i8] c"%d \00"
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@.str1 = internal constant [2 x i8] c"\0A\00"
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define void @update(<3 x i16>* %dst, <3 x i16>* %src, i32 %n) nounwind {
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; CHECK-LABEL: update:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: andl $-8, %esp
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; CHECK-NEXT: subl $40, %esp
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; CHECK-NEXT: movl {{\.LCPI.*}}, %eax
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; CHECK-NEXT: movdqa {{.*#+}} xmm0 = <1,1,1,u>
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movw $1, {{[0-9]+}}(%esp)
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; CHECK-NEXT: jmp .LBB0_1
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .LBB0_2: # %forbody
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; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl 12(%ebp), %edx
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; CHECK-NEXT: movl 8(%ebp), %ecx
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; CHECK-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
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; CHECK-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
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; CHECK-NEXT: pinsrd $2, 4(%edx,%eax,8), %xmm2
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; CHECK-NEXT: paddd %xmm0, %xmm2
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; CHECK-NEXT: pextrw $4, %xmm2, 4(%ecx,%eax,8)
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; CHECK-NEXT: pshufb %xmm1, %xmm2
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; CHECK-NEXT: movd %xmm2, (%ecx,%eax,8)
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; CHECK-NEXT: incl {{[0-9]+}}(%esp)
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; CHECK-NEXT: .LBB0_1: # %forcond
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: cmpl 16(%ebp), %eax
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; CHECK-NEXT: jl .LBB0_2
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; CHECK-NEXT: # BB#3: # %afterfor
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; CHECK-NEXT: movl %ebp, %esp
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: retl
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entry:
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%dst.addr = alloca <3 x i16>* ; <<3 x i16>**> [#uses=2]
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%src.addr = alloca <3 x i16>* ; <<3 x i16>**> [#uses=2]
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%n.addr = alloca i32 ; <i32*> [#uses=2]
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%v = alloca <3 x i16>, align 8 ; <<3 x i16>*> [#uses=1]
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%i = alloca i32, align 4 ; <i32*> [#uses=6]
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%dst.addr = alloca <3 x i16>*
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%src.addr = alloca <3 x i16>*
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%n.addr = alloca i32
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%v = alloca <3 x i16>, align 8
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%i = alloca i32, align 4
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store <3 x i16>* %dst, <3 x i16>** %dst.addr
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store <3 x i16>* %src, <3 x i16>** %src.addr
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store i32 %n, i32* %n.addr
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@ -20,31 +56,31 @@ entry:
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32, i32* %i ; <i32> [#uses=1]
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%tmp1 = load i32, i32* %n.addr ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, %tmp1 ; <i1> [#uses=1]
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forcond:
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%tmp = load i32, i32* %i
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%tmp1 = load i32, i32* %n.addr
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%cmp = icmp slt i32 %tmp, %tmp1
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp2 = load i32, i32* %i ; <i32> [#uses=1]
|
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%tmp3 = load <3 x i16>*, <3 x i16>** %dst.addr ; <<3 x i16>*> [#uses=1]
|
||||
%arrayidx = getelementptr <3 x i16>, <3 x i16>* %tmp3, i32 %tmp2 ; <<3 x i16>*> [#uses=1]
|
||||
%tmp4 = load i32, i32* %i ; <i32> [#uses=1]
|
||||
%tmp5 = load <3 x i16>*, <3 x i16>** %src.addr ; <<3 x i16>*> [#uses=1]
|
||||
%arrayidx6 = getelementptr <3 x i16>, <3 x i16>* %tmp5, i32 %tmp4 ; <<3 x i16>*> [#uses=1]
|
||||
%tmp7 = load <3 x i16>, <3 x i16>* %arrayidx6 ; <<3 x i16>> [#uses=1]
|
||||
%add = add <3 x i16> %tmp7, < i16 1, i16 1, i16 1 > ; <<3 x i16>> [#uses=1]
|
||||
forbody:
|
||||
%tmp2 = load i32, i32* %i
|
||||
%tmp3 = load <3 x i16>*, <3 x i16>** %dst.addr
|
||||
%arrayidx = getelementptr <3 x i16>, <3 x i16>* %tmp3, i32 %tmp2
|
||||
%tmp4 = load i32, i32* %i
|
||||
%tmp5 = load <3 x i16>*, <3 x i16>** %src.addr
|
||||
%arrayidx6 = getelementptr <3 x i16>, <3 x i16>* %tmp5, i32 %tmp4
|
||||
%tmp7 = load <3 x i16>, <3 x i16>* %arrayidx6
|
||||
%add = add <3 x i16> %tmp7, < i16 1, i16 1, i16 1 >
|
||||
store <3 x i16> %add, <3 x i16>* %arrayidx
|
||||
br label %forinc
|
||||
|
||||
forinc: ; preds = %forbody
|
||||
%tmp8 = load i32, i32* %i ; <i32> [#uses=1]
|
||||
%inc = add i32 %tmp8, 1 ; <i32> [#uses=1]
|
||||
forinc:
|
||||
%tmp8 = load i32, i32* %i
|
||||
%inc = add i32 %tmp8, 1
|
||||
store i32 %inc, i32* %i
|
||||
br label %forcond
|
||||
|
||||
afterfor: ; preds = %forcond
|
||||
afterfor:
|
||||
ret void
|
||||
}
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user