From 6877dd3fb05bb7f8fabf907e520c7d3ae0fab341 Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Mon, 2 Dec 2002 21:10:35 +0000 Subject: [PATCH] Fix order of operands on a store from reg to [reg+offset]. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4857 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86RegisterInfo.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 9b7256f9e64..4ec29710700 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -31,8 +31,8 @@ X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB, unsigned ImmOffset, unsigned dataSize) const { - MachineInstr *MI = addRegOffset(BuildMI(X86::MOVrm32, 5).addReg(SrcReg), - DestReg, ImmOffset); + MachineInstr *MI = addRegOffset(BuildMI(X86::MOVrm32, 5), + DestReg, ImmOffset).addReg(SrcReg); return ++(MBB->insert(MBBI, MI)); }