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Remove dead member variables of SparcV9SchedInfo and TargetSchedInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11994 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -191,16 +191,6 @@ struct TargetSchedInfo {
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unsigned maxNumIssueTotal;
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unsigned maxNumIssueTotal;
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int longestIssueConflict;
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int longestIssueConflict;
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int branchMispredictPenalty; // 4 for SPARC IIi
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int branchTargetUnknownPenalty; // 2 for SPARC IIi
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int l1DCacheMissPenalty; // 7 or 9 for SPARC IIi
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int l1ICacheMissPenalty; // ? for SPARC IIi
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bool inOrderLoads; // true for SPARC IIi
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bool inOrderIssue; // true for SPARC IIi
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bool inOrderExec; // false for most architectures
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bool inOrderRetire; // true for most architectures
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protected:
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protected:
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inline const InstrRUsage& getInstrRUsage(MachineOpCode opCode) const {
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inline const InstrRUsage& getInstrRUsage(MachineOpCode opCode) const {
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assert(opCode >= 0 && opCode < (int) instrRUsages.size());
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assert(opCode >= 0 && opCode < (int) instrRUsages.size());
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@ -749,16 +749,6 @@ SparcV9SchedInfo::SparcV9SchedInfo(const TargetMachine& tgt)
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maxNumIssueTotal = 4;
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maxNumIssueTotal = 4;
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longestIssueConflict = 0; // computed from issuesGaps[]
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longestIssueConflict = 0; // computed from issuesGaps[]
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branchMispredictPenalty = 4; // 4 for SPARC IIi
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branchTargetUnknownPenalty = 2; // 2 for SPARC IIi
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l1DCacheMissPenalty = 8; // 7 or 9 for SPARC IIi
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l1ICacheMissPenalty = 8; // ? for SPARC IIi
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inOrderLoads = true; // true for SPARC IIi
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inOrderIssue = true; // true for SPARC IIi
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inOrderExec = false; // false for most architectures
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inOrderRetire= true; // true for most architectures
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// must be called after above parameters are initialized.
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// must be called after above parameters are initialized.
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initializeResources();
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initializeResources();
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}
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}
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