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The Mips standalone assembler memory instruction support.
This includes sb,sc,sh,sw,lb,lw,lbu,lh,lhu,ll,lw Test case included Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163346 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jack Carter
parent
cc77eece74
commit
6b96c3f71f
@ -60,6 +60,9 @@ class MipsAsmParser : public MCTargetAsmParser {
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bool tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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StringRef Mnemonic);
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bool parseMemOffset(const MCExpr *&Res);
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bool parseRelocOperand(const MCExpr *&Res);
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MCSymbolRefExpr::VariantKind getVariantKind(StringRef Symbol);
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bool isMips64() const {
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return (STI.getFeatureBits() & Mips::FeatureMips64) != 0;
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}
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@ -114,6 +117,11 @@ class MipsOperand : public MCParsedAsmOperand {
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struct {
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const MCExpr *Val;
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} Imm;
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struct {
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unsigned Base;
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const MCExpr *Off;
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} Mem;
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};
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SMLoc StartLoc, EndLoc;
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@ -141,7 +149,12 @@ public:
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}
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void addMemOperands(MCInst &Inst, unsigned N) const {
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llvm_unreachable("unimplemented!");
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assert(N == 2 && "Invalid number of operands!");
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Inst.addOperand(MCOperand::CreateReg(getMemBase()));
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const MCExpr *Expr = getMemOff();
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addExpr(Inst,Expr);
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}
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bool isReg() const { return Kind == k_Register; }
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@ -164,6 +177,16 @@ public:
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return Imm.Val;
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}
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unsigned getMemBase() const {
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assert((Kind == k_Memory) && "Invalid access!");
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return Mem.Base;
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}
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const MCExpr *getMemOff() const {
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assert((Kind == k_Memory) && "Invalid access!");
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return Mem.Off;
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}
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static MipsOperand *CreateToken(StringRef Str, SMLoc S) {
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MipsOperand *Op = new MipsOperand(k_Token);
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Op->Tok.Data = Str.data();
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@ -189,6 +212,16 @@ public:
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return Op;
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}
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static MipsOperand *CreateMem(unsigned Base, const MCExpr *Off,
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SMLoc S, SMLoc E) {
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MipsOperand *Op = new MipsOperand(k_Memory);
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Op->Mem.Base = Base;
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Op->Mem.Off = Off;
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Op->StartLoc = S;
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Op->EndLoc = E;
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return Op;
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}
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/// getStartLoc - Get the location of the first token of this operand.
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SMLoc getStartLoc() const { return StartLoc; }
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/// getEndLoc - Get the location of the last token of this operand.
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@ -324,8 +357,8 @@ int MipsAsmParser::tryParseRegister(StringRef Mnemonic) {
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std::string lowerCase = Tok.getString().lower();
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RegNum = matchRegisterName(lowerCase);
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} else if (Tok.is(AsmToken::Integer))
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RegNum = matchRegisterByNumber(static_cast<unsigned> (Tok.getIntVal()),
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Mnemonic.lower());
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RegNum = matchRegisterByNumber(static_cast<unsigned> (Tok.getIntVal()),
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Mnemonic.lower());
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return RegNum;
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}
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@ -393,14 +426,13 @@ bool MipsAsmParser::ParseOperand(SmallVectorImpl<MCParsedAsmOperand*>&Operands,
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if (Parser.ParseIdentifier(Identifier))
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return true;
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SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer()-1);
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SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
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StringRef Id = StringRef("$" + Identifier.str());
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MCSymbol *Sym = getContext().GetOrCreateSymbol(Id);
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// Otherwise create a symbol ref.
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const MCExpr *Res = MCSymbolRefExpr::Create(Sym,
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MCSymbolRefExpr::VK_None,
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const MCExpr *Res = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_None,
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getContext());
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Operands.push_back(MipsOperand::CreateImm(Res, S, E));
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@ -417,14 +449,89 @@ bool MipsAsmParser::ParseOperand(SmallVectorImpl<MCParsedAsmOperand*>&Operands,
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SMLoc S = Parser.getTok().getLoc();
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if (getParser().ParseExpression(IdVal))
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return true;
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SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer()-1);
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SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
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Operands.push_back(MipsOperand::CreateImm(IdVal, S, E));
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return false;
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}
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case AsmToken::Percent: {
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//it is a symbol reference or constant expression
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const MCExpr *IdVal;
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SMLoc S = Parser.getTok().getLoc(); //start location of the operand
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if (parseRelocOperand(IdVal))
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return true;
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SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
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Operands.push_back(MipsOperand::CreateImm(IdVal, S, E));
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return false;
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}//case AsmToken::Percent
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}//switch(getLexer().getKind())
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return true;
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}
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bool MipsAsmParser::parseRelocOperand(const MCExpr *&Res) {
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Parser.Lex(); //eat % token
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const AsmToken &Tok = Parser.getTok(); //get next token, operation
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if (Tok.isNot(AsmToken::Identifier))
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return true;
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StringRef Str = Tok.getIdentifier();
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Parser.Lex(); //eat identifier
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//now make expression from the rest of the operand
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const MCExpr *IdVal;
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SMLoc EndLoc;
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if (getLexer().getKind() == AsmToken::LParen) {
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while (1) {
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Parser.Lex(); //eat '(' token
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if (getLexer().getKind() == AsmToken::Percent) {
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Parser.Lex(); //eat % token
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const AsmToken &nextTok = Parser.getTok();
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if (nextTok.isNot(AsmToken::Identifier))
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return true;
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Str = StringRef(Str.str() + "(%" + nextTok.getIdentifier().str());
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Parser.Lex(); //eat identifier
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if (getLexer().getKind() != AsmToken::LParen)
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return true;
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} else
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break;
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}
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if (getParser().ParseParenExpression(IdVal,EndLoc))
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return true;
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while (getLexer().getKind() == AsmToken::RParen)
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Parser.Lex(); //eat ')' token
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} else
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return true; //parenthesis must follow reloc operand
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SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
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//Check the type of the expression
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if (MCConstantExpr::classof(IdVal)) {
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//it's a constant, evaluate lo or hi value
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int Val = ((const MCConstantExpr*)IdVal)->getValue();
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if (Str == "lo") {
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Val = Val & 0xffff;
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} else if (Str == "hi") {
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Val = (Val & 0xffff0000) >> 16;
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}
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Res = MCConstantExpr::Create(Val, getContext());
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return false;
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}
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if (MCSymbolRefExpr::classof(IdVal)) {
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//it's a symbol, create symbolic expression from symbol
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StringRef Symbol = ((const MCSymbolRefExpr*)IdVal)->getSymbol().getName();
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MCSymbolRefExpr::VariantKind VK = getVariantKind(Str);
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Res = MCSymbolRefExpr::Create(Symbol,VK,getContext());
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return false;
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}
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return true;
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}
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bool MipsAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
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SMLoc &EndLoc) {
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@ -434,11 +541,108 @@ bool MipsAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
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return (RegNo == (unsigned)-1);
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}
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bool MipsAsmParser::parseMemOffset(const MCExpr *&Res) {
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SMLoc S;
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switch(getLexer().getKind()) {
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default:
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return true;
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case AsmToken::Integer:
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case AsmToken::Minus:
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case AsmToken::Plus:
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return (getParser().ParseExpression(Res));
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case AsmToken::Percent: {
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return parseRelocOperand(Res);
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}
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case AsmToken::LParen:
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return false; //it's probably assuming 0
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}
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return true;
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}
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MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseMemOperand(
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SmallVectorImpl<MCParsedAsmOperand*>&Operands) {
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const MCExpr *IdVal = 0;
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SMLoc S;
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//first operand is the offset
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S = Parser.getTok().getLoc();
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if (parseMemOffset(IdVal))
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return MatchOperand_ParseFail;
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const AsmToken &Tok = Parser.getTok(); //get next token
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if (Tok.isNot(AsmToken::LParen)) {
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Error(Parser.getTok().getLoc(), "'(' expected");
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return MatchOperand_ParseFail;
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}
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Parser.Lex(); // Eat '(' token.
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const AsmToken &Tok1 = Parser.getTok(); //get next token
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if (Tok1.is(AsmToken::Dollar)) {
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Parser.Lex(); // Eat '$' token.
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if (tryParseRegisterOperand(Operands,"")) {
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Error(Parser.getTok().getLoc(), "unexpected token in operand");
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return MatchOperand_ParseFail;
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}
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} else {
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Error(Parser.getTok().getLoc(),"unexpected token in operand");
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return MatchOperand_ParseFail;
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}
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const AsmToken &Tok2 = Parser.getTok(); //get next token
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if (Tok2.isNot(AsmToken::RParen)) {
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Error(Parser.getTok().getLoc(), "')' expected");
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return MatchOperand_ParseFail;
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}
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SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
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Parser.Lex(); // Eat ')' token.
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if (IdVal == 0)
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IdVal = MCConstantExpr::Create(0, getContext());
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//now replace register operand with the mem operand
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MipsOperand* op = static_cast<MipsOperand*>(Operands.back());
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int RegNo = op->getReg();
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//remove register from operands
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Operands.pop_back();
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//and add memory operand
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Operands.push_back(MipsOperand::CreateMem(RegNo, IdVal, S, E));
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delete op;
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return MatchOperand_Success;
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}
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MCSymbolRefExpr::VariantKind MipsAsmParser::getVariantKind(StringRef Symbol) {
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MCSymbolRefExpr::VariantKind VK
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= StringSwitch<MCSymbolRefExpr::VariantKind>(Symbol)
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.Case("hi", MCSymbolRefExpr::VK_Mips_ABS_HI)
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.Case("lo", MCSymbolRefExpr::VK_Mips_ABS_LO)
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.Case("gp_rel", MCSymbolRefExpr::VK_Mips_GPREL)
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.Case("call16", MCSymbolRefExpr::VK_Mips_GOT_CALL)
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.Case("got", MCSymbolRefExpr::VK_Mips_GOT)
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.Case("tlsgd", MCSymbolRefExpr::VK_Mips_TLSGD)
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.Case("tlsldm", MCSymbolRefExpr::VK_Mips_TLSLDM)
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.Case("dtprel_hi", MCSymbolRefExpr::VK_Mips_DTPREL_HI)
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.Case("dtprel_lo", MCSymbolRefExpr::VK_Mips_DTPREL_LO)
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.Case("gottprel", MCSymbolRefExpr::VK_Mips_GOTTPREL)
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.Case("tprel_hi", MCSymbolRefExpr::VK_Mips_TPREL_HI)
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.Case("tprel_lo", MCSymbolRefExpr::VK_Mips_TPREL_LO)
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.Case("got_disp", MCSymbolRefExpr::VK_Mips_GOT_DISP)
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.Case("got_page", MCSymbolRefExpr::VK_Mips_GOT_PAGE)
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.Case("got_ofst", MCSymbolRefExpr::VK_Mips_GOT_OFST)
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.Case("hi(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_HI)
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.Case("lo(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_LO)
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.Default(MCSymbolRefExpr::VK_None);
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return VK;
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}
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bool MipsAsmParser::
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ParseInstruction(StringRef Name, SMLoc NameLoc,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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41
test/MC/Mips/mips-memory-instructions.s
Normal file
41
test/MC/Mips/mips-memory-instructions.s
Normal file
@ -0,0 +1,41 @@
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# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
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# Check that the assembler can handle the documented syntax
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# for loads and stores.
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# CHECK: .section __TEXT,__text,regular,pure_instructions
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#------------------------------------------------------------------------------
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# Memory store instructions
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#------------------------------------------------------------------------------
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# CHECK: sb $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa0]
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# CHECK: sc $4, 16($5) # encoding: [0x10,0x00,0xa4,0xe0]
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# CHECK: sh $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa4]
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# CHECK: sw $4, 16($5) # encoding: [0x10,0x00,0xa4,0xac]
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# CHECK: sw $7, 0($5) # encoding: [0x00,0x00,0xa7,0xac]
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sb $4, 16($5)
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sc $4, 16($5)
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sh $4, 16($5)
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sw $4, 16($5)
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sw $7, ($5)
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#------------------------------------------------------------------------------
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# Memory load instructions
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#------------------------------------------------------------------------------
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# CHECK: lb $4, 4($5) # encoding: [0x04,0x00,0xa4,0x80]
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# CHECK: lw $4, 4($5) # encoding: [0x04,0x00,0xa4,0x8c]
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# CHECK: lbu $4, 4($5) # encoding: [0x04,0x00,0xa4,0x90]
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# CHECK: lh $4, 4($5) # encoding: [0x04,0x00,0xa4,0x84]
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# CHECK: lhu $4, 4($5) # encoding: [0x04,0x00,0xa4,0x94]
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# CHECK: ll $4, 4($5) # encoding: [0x04,0x00,0xa4,0xc0]
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# CHECK: lw $4, 4($5) # encoding: [0x04,0x00,0xa4,0x8c]
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# CHECK: lw $7, 0($7) # encoding: [0x00,0x00,0xe7,0x8c]
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# CHECK: lw $2, 16($sp) # encoding: [0x10,0x00,0xa2,0x8f]
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lb $4, 4($5)
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lw $4, 4($5)
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lbu $4, 4($5)
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lh $4, 4($5)
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lhu $4, 4($5)
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ll $4, 4($5)
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lw $4, 4($5)
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lw $7, ($7)
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lw $2, 16($sp)
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