From 6bcf1b7eed0fabed92298cedce0fcacdc55fdfd7 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 28 Sep 2005 18:27:58 +0000 Subject: [PATCH] expose commutativity information git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23498 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstrInfo.td | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index d774f8455a2..18eaf344914 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -81,27 +81,36 @@ def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg SDTCisVTSmallerThanOp<2, 1> ]>; +//===----------------------------------------------------------------------===// +// Selection DAG Node Properties. +// +// Note: These are hard coded into tblgen. +// +class SDNodeProperty; +def SDNPCommutative : SDNodeProperty; //===----------------------------------------------------------------------===// // Selection DAG Node definitions. // -class SDNode { +class SDNode props = [], string sdclass = "SDNode"> { string Opcode = opcode; string SDClass = sdclass; + list Properties = props; SDTypeProfile TypeProfile = typeprof; } def set; def node; -def imm : SDNode<"ISD::Constant" , SDTImm , "ConstantSDNode">; -def vt : SDNode<"ISD::VALUETYPE" , SDTVT , "VTSDNode">; -def and : SDNode<"ISD::AND" , SDTIntBinOp>; -def or : SDNode<"ISD::OR" , SDTIntBinOp>; -def xor : SDNode<"ISD::XOR" , SDTIntBinOp>; -def add : SDNode<"ISD::ADD" , SDTBinOp>; +def imm : SDNode<"ISD::Constant" , SDTImm , [], "ConstantSDNode">; +def vt : SDNode<"ISD::VALUETYPE" , SDTVT , [], "VTSDNode">; +def and : SDNode<"ISD::AND" , SDTIntBinOp, [SDNPCommutative]>; +def or : SDNode<"ISD::OR" , SDTIntBinOp, [SDNPCommutative]>; +def xor : SDNode<"ISD::XOR" , SDTIntBinOp, [SDNPCommutative]>; +def add : SDNode<"ISD::ADD" , SDTBinOp , [SDNPCommutative]>; def sub : SDNode<"ISD::SUB" , SDTBinOp>; -def mul : SDNode<"ISD::MUL" , SDTBinOp>; +def mul : SDNode<"ISD::MUL" , SDTBinOp , [SDNPCommutative]>; def sdiv : SDNode<"ISD::SDIV" , SDTBinOp>; def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>; def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp>;