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[Thumb-1] Add optimized constant materialization for integers [256..512)

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We can materialize these integers using a MOV; ADDi8 pair.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272007 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
James Molloy 2016-06-07 13:10:14 +00:00
parent 7e0019d8f7
commit 6e988c5976
3 changed files with 24 additions and 0 deletions
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1
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -485,6 +485,7 @@ unsigned ARMDAGToDAGISel::ConstantMaterializationCost(unsigned Val) const {
if (Subtarget->isThumb()) {
if (Val <= 255) return 1; // MOV
if (Subtarget->hasV6T2Ops() && Val <= 0xffff) return 1; // MOVW
if (Val <= 511) return 2; // MOV + ADDi8
if (~Val <= 255) return 2; // MOV + MVN
if (ARM_AM::isThumbImmShiftedVal(Val)) return 2; // MOV + LSL
} else {

12
lib/Target/ARM/ARMInstrThumb.td
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@ -66,6 +66,14 @@ def thumb_immshifted_shamt : SDNodeXForm<imm, [{
return CurDAG->getTargetConstant(V, SDLoc(N), MVT::i32);
}]>;
def imm256_511 : ImmLeaf<i32, [{
return Imm >= 256 && Imm < 512;
}]>;
def thumb_imm256_511_addend : SDNodeXForm<imm, [{
return CurDAG->getTargetConstant(N->getZExtValue() - 255, SDLoc(N), MVT::i32);
}]>;
// Scaled 4 immediate.
def t_imm0_1020s4_asmoperand: AsmOperandClass { let Name = "Imm0_1020s4"; }
def t_imm0_1020s4 : Operand<i32> {
@ -1489,6 +1497,10 @@ def : T1Pat<(i32 thumb_immshifted:$src),
def : T1Pat<(i32 imm0_255_comp:$src),
(tMVN (tMOVi8 (imm_comp_XFORM imm:$src)))>;
def : T1Pat<(i32 imm256_511:$src),
(tADDi8 (tMOVi8 255),
(thumb_imm256_511_addend imm:$src))>;
// Pseudo instruction that combines ldr from constpool and add pc. This should
// be expanded into two instructions late to allow if-conversion and
// scheduling.

11
test/CodeGen/Thumb/constants.ll Normal file
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@ -0,0 +1,11 @@
; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-m0 -verify-machineinstrs | FileCheck --check-prefix CHECK-T1 %s
; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-m3 -verify-machineinstrs | FileCheck --check-prefix CHECK-T2 %s
; CHECK-T1-LABEL: @mov_and_add
; CHECK-T2-LABEL: @mov_and_add
; CHECK-T1: movs r0, #255
; CHECK-T1: adds r0, #12
; CHECK-T2: movw r0, #267
define i32 @mov_and_add() {
ret i32 267
}