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Codegen x < 0 | y < 0 as (x|y) < 0. This allows us to compile this to:
_foo: or r2, r4, r3 srwi r3, r2, 31 blr instead of: _foo: srwi r2, r4, 31 srwi r3, r3, 31 or r3, r2, r3 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21544 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -809,6 +809,7 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
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return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
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}
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return false;
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// TODO we could handle some SRA cases here.
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default: break;
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}
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@ -1061,11 +1062,13 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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// (X != 0) | (Y != 0) -> (X|Y != 0)
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// (X == 0) & (Y == 0) -> (X|Y == 0)
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// (X < 0) | (Y < 0) -> (X|Y < 0)
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if (LR == RR && isa<ConstantSDNode>(LR) &&
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cast<ConstantSDNode>(LR)->getValue() == 0 &&
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Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) {
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if ((Op2 == ISD::SETEQ && Opcode == ISD::AND) ||
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(Op2 == ISD::SETNE && Opcode == ISD::OR))
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(Op2 == ISD::SETNE && Opcode == ISD::OR) ||
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(Op2 == ISD::SETLT && Opcode == ISD::OR))
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return getSetCC(Op2, VT,
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getNode(ISD::OR, LR.getValueType(), LL, RL), LR);
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}
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