mirror of
https://github.com/RPCSX/llvm.git
synced 2024-11-25 04:39:44 +00:00
Short-term workaround for frame-related weirdness on win64.
Some other minor win64 fixes as well. Patch by Michael Beck! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80370 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
1cb2de3188
commit
6f9bb6f31b
@ -2035,6 +2035,7 @@ bool X86InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
|
||||
if (MI != MBB.end()) DL = MI->getDebugLoc();
|
||||
|
||||
bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
|
||||
bool isWin64 = TM.getSubtarget<X86Subtarget>().isTargetWin64();
|
||||
unsigned SlotSize = is64Bit ? 8 : 4;
|
||||
|
||||
MachineFunction &MF = *MBB.getParent();
|
||||
@ -2051,7 +2052,7 @@ bool X86InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
|
||||
if (Reg == FPReg)
|
||||
// X86RegisterInfo::emitPrologue will handle spilling of frame register.
|
||||
continue;
|
||||
if (RegClass != &X86::VR128RegClass) {
|
||||
if (RegClass != &X86::VR128RegClass && !isWin64) {
|
||||
CalleeFrameSize += SlotSize;
|
||||
BuildMI(MBB, MI, DL, get(Opc)).addReg(Reg, RegState::Kill);
|
||||
} else {
|
||||
@ -2075,6 +2076,7 @@ bool X86InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
|
||||
MachineFunction &MF = *MBB.getParent();
|
||||
unsigned FPReg = RI.getFrameRegister(MF);
|
||||
bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
|
||||
bool isWin64 = TM.getSubtarget<X86Subtarget>().isTargetWin64();
|
||||
unsigned Opc = is64Bit ? X86::POP64r : X86::POP32r;
|
||||
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
|
||||
unsigned Reg = CSI[i].getReg();
|
||||
@ -2082,7 +2084,7 @@ bool X86InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
|
||||
// X86RegisterInfo::emitEpilogue will handle restoring of frame register.
|
||||
continue;
|
||||
const TargetRegisterClass *RegClass = CSI[i].getRegClass();
|
||||
if (RegClass != &X86::VR128RegClass) {
|
||||
if (RegClass != &X86::VR128RegClass && !isWin64) {
|
||||
BuildMI(MBB, MI, DL, get(Opc), Reg);
|
||||
} else {
|
||||
loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RegClass);
|
||||
|
@ -23,7 +23,7 @@
|
||||
using namespace llvm;
|
||||
|
||||
// Determine the platform we're running on
|
||||
#if defined (__x86_64__) || defined (_M_AMD64)
|
||||
#if defined (__x86_64__) || defined (_M_AMD64) || defined (_M_X64)
|
||||
# define X86_64_JIT
|
||||
#elif defined(__i386__) || defined(i386) || defined(_M_IX86)
|
||||
# define X86_32_JIT
|
||||
|
@ -160,7 +160,7 @@ unsigned X86Subtarget::getSpecialAddressLatency() const {
|
||||
/// specified arguments. If we can't run cpuid on the host, return true.
|
||||
bool X86::GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
|
||||
unsigned *rECX, unsigned *rEDX) {
|
||||
#if defined(__x86_64__) || defined(_M_AMD64)
|
||||
#if defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
|
||||
#if defined(__GNUC__)
|
||||
// gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
|
||||
asm ("movq\t%%rbx, %%rsi\n\t"
|
||||
|
Loading…
Reference in New Issue
Block a user