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Allow negative immediates in ARM and Thumb2 compares.

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ARM and Thumb2 mode can use cmn instructions to compare against negative
immediates. Thumb1 mode can't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154183 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-04-06 17:45:04 +00:00
parent b381578fcb
commit 70fbea7c75
2 changed files with 37 additions and 2 deletions
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6
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -8614,10 +8614,12 @@ bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
/// a register against the immediate without having to materialize the /// a register against the immediate without having to materialize the
/// immediate into a register. /// immediate into a register.
bool ARMTargetLowering::isLegalICmpImmediate(int64_t Imm) const { bool ARMTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
// Thumb2 and ARM modes can use cmn for negative immediates.
if (!Subtarget->isThumb()) if (!Subtarget->isThumb())
return ARM_AM::getSOImmVal(Imm) != -1; return ARM_AM::getSOImmVal(std::abs(Imm)) != -1;
if (Subtarget->isThumb2()) if (Subtarget->isThumb2())
return ARM_AM::getT2SOImmVal(Imm) != -1; return ARM_AM::getT2SOImmVal(std::abs(Imm)) != -1;
// Thumb1 doesn't have cmn, and only 8-bit immediates.
return Imm >= 0 && Imm <= 255; return Imm >= 0 && Imm <= 255;
} }

33
test/CodeGen/ARM/lsr-icmp-imm.ll Normal file
View File

@ -0,0 +1,33 @@
; RUN: llc -mtriple=thumbv7-apple-ios -disable-code-place < %s | FileCheck %s
; RUN: llc -mtriple=armv7-apple-ios -disable-code-place < %s | FileCheck %s
; LSR should compare against the post-incremented induction variable.
; In this case, the immediate value is -2 which requires a cmn instruction.
;
; CHECK: f:
; CHECK: %for.body
; CHECK: sub{{.*}}[[IV:r[0-9]+]], #2
; CHECK: cmn{{.*}}[[IV]], #2
; CHECK: bne
define i32 @f(i32* nocapture %a, i32 %i) nounwind readonly ssp {
entry:
%cmp3 = icmp eq i32 %i, -2
br i1 %cmp3, label %for.end, label %for.body
for.body: ; preds = %entry, %for.body
%bi.06 = phi i32 [ %i.addr.0.bi.0, %for.body ], [ 0, %entry ]
%i.addr.05 = phi i32 [ %sub, %for.body ], [ %i, %entry ]
%b.04 = phi i32 [ %.b.0, %for.body ], [ 0, %entry ]
%arrayidx = getelementptr inbounds i32* %a, i32 %i.addr.05
%0 = load i32* %arrayidx, align 4
%cmp1 = icmp sgt i32 %0, %b.04
%.b.0 = select i1 %cmp1, i32 %0, i32 %b.04
%i.addr.0.bi.0 = select i1 %cmp1, i32 %i.addr.05, i32 %bi.06
%sub = add nsw i32 %i.addr.05, -2
%cmp = icmp eq i32 %i.addr.05, 0
br i1 %cmp, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
%bi.0.lcssa = phi i32 [ 0, %entry ], [ %i.addr.0.bi.0, %for.body ]
ret i32 %bi.0.lcssa
}