mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-11 05:35:11 +00:00
[DAG] x & x --> x
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285521 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
6c05e2a692
commit
73a78bf8d3
@ -3134,6 +3134,10 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
|
||||
SDValue N1 = N->getOperand(1);
|
||||
EVT VT = N1.getValueType();
|
||||
|
||||
// x & x --> x
|
||||
if (N0 == N1)
|
||||
return N0;
|
||||
|
||||
// fold vector ops
|
||||
if (VT.isVector()) {
|
||||
if (SDValue FoldedVOp = SimplifyVBinOp(N))
|
||||
|
@ -4,7 +4,6 @@
|
||||
define i32 @and_self(i32 %x) {
|
||||
; CHECK-LABEL: and_self:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: andl %edi, %edi
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%and = and i32 %x, %x
|
||||
@ -14,7 +13,6 @@ define i32 @and_self(i32 %x) {
|
||||
define <4 x i32> @and_self_vec(<4 x i32> %x) {
|
||||
; CHECK-LABEL: and_self_vec:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: andps %xmm0, %xmm0
|
||||
; CHECK-NEXT: retq
|
||||
%and = and <4 x i32> %x, %x
|
||||
ret <4 x i32> %and
|
||||
|
Loading…
Reference in New Issue
Block a user