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Default scheduling preference is SchedulingForLatency.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25603 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-01-25 09:15:54 +00:00
parent 0b2afbd58a
commit 7558b0e80c
4 changed files with 4 additions and 0 deletions
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1
lib/Target/IA64/IA64ISelLowering.cpp
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@ -93,6 +93,7 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
setSchedulingPreference(SchedulingForLatency);
setStackPointerRegisterToSaveRestore(IA64::r12);
computeRegisterProperties();

1
lib/Target/PowerPC/PPCISelLowering.cpp
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@ -144,6 +144,7 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
}
setSetCCResultContents(ZeroOrOneSetCCResult);
setSchedulingPreference(SchedulingForLatency);
setStackPointerRegisterToSaveRestore(PPC::R1);
computeRegisterProperties();

1
lib/Target/Sparc/SparcISelDAGToDAG.cpp
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@ -166,6 +166,7 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
setSchedulingPreference(SchedulingForLatency);
setStackPointerRegisterToSaveRestore(V8::O6);
computeRegisterProperties();

1
lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
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@ -166,6 +166,7 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
setSchedulingPreference(SchedulingForLatency);
setStackPointerRegisterToSaveRestore(V8::O6);
computeRegisterProperties();