mirror of
https://github.com/RPCSX/llvm.git
synced 2025-01-07 20:40:46 +00:00
[x86] regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272396 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel
parent
570bf9da46
commit
7564bb471e
@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE
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; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+avx2 < %s | FileCheck %s --check-prefix=AVX
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@ -6,164 +7,226 @@
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; Only equal/not-equal/ordered/unordered can be safely commuted
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;
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define <4 x i32> @commute_cmpps_eq(<4 x float>* %a0, <4 x float> %a1) #0 {
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;SSE-LABEL: commute_cmpps_eq
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;SSE: cmpeqps (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_cmpps_eq
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;AVX: vcmpeqps (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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define <4 x i32> @commute_cmpps_eq(<4 x float>* %a0, <4 x float> %a1) {
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; SSE-LABEL: commute_cmpps_eq:
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; SSE: # BB#0:
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; SSE-NEXT: cmpeqps (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_eq:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpeqps (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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%1 = load <4 x float>, <4 x float>* %a0
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%2 = fcmp oeq <4 x float> %1, %a1
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%3 = sext <4 x i1> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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define <4 x i32> @commute_cmpps_ne(<4 x float>* %a0, <4 x float> %a1) #0 {
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;SSE-LABEL: commute_cmpps_ne
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;SSE: cmpneqps (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_cmpps_ne
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;AVX: vcmpneqps (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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define <4 x i32> @commute_cmpps_ne(<4 x float>* %a0, <4 x float> %a1) {
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; SSE-LABEL: commute_cmpps_ne:
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; SSE: # BB#0:
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; SSE-NEXT: cmpneqps (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_ne:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpneqps (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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%1 = load <4 x float>, <4 x float>* %a0
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%2 = fcmp une <4 x float> %1, %a1
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%3 = sext <4 x i1> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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define <4 x i32> @commute_cmpps_ord(<4 x float>* %a0, <4 x float> %a1) #0 {
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;SSE-LABEL: commute_cmpps_ord
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;SSE: cmpordps (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_cmpps_ord
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;AVX: vcmpordps (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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define <4 x i32> @commute_cmpps_ord(<4 x float>* %a0, <4 x float> %a1) {
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; SSE-LABEL: commute_cmpps_ord:
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; SSE: # BB#0:
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; SSE-NEXT: cmpordps (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_ord:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpordps (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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%1 = load <4 x float>, <4 x float>* %a0
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%2 = fcmp ord <4 x float> %1, %a1
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%3 = sext <4 x i1> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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define <4 x i32> @commute_cmpps_uno(<4 x float>* %a0, <4 x float> %a1) #0 {
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;SSE-LABEL: commute_cmpps_uno
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;SSE: cmpunordps (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_cmpps_uno
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;AVX: vcmpunordps (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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define <4 x i32> @commute_cmpps_uno(<4 x float>* %a0, <4 x float> %a1) {
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; SSE-LABEL: commute_cmpps_uno:
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; SSE: # BB#0:
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; SSE-NEXT: cmpunordps (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_uno:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpunordps (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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%1 = load <4 x float>, <4 x float>* %a0
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%2 = fcmp uno <4 x float> %1, %a1
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%3 = sext <4 x i1> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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define <4 x i32> @commute_cmpps_lt(<4 x float>* %a0, <4 x float> %a1) #0 {
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;SSE-LABEL: commute_cmpps_lt
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;SSE: movaps (%rdi), %xmm1
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;SSE-NEXT: cmpltps %xmm0, %xmm1
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;SSE-NEXT: movaps %xmm1, %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_cmpps_lt
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;AVX: vmovaps (%rdi), %xmm1
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;AVX-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
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;AVX-NEXT: retq
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define <4 x i32> @commute_cmpps_lt(<4 x float>* %a0, <4 x float> %a1) {
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; SSE-LABEL: commute_cmpps_lt:
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; SSE: # BB#0:
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; SSE-NEXT: movaps (%rdi), %xmm1
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; SSE-NEXT: cmpltps %xmm0, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_lt:
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; AVX: # BB#0:
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; AVX-NEXT: vmovaps (%rdi), %xmm1
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; AVX-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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%1 = load <4 x float>, <4 x float>* %a0
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%2 = fcmp olt <4 x float> %1, %a1
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%3 = sext <4 x i1> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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define <4 x i32> @commute_cmpps_le(<4 x float>* %a0, <4 x float> %a1) #0 {
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;SSE-LABEL: commute_cmpps_le
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;SSE: movaps (%rdi), %xmm1
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;SSE-NEXT: cmpleps %xmm0, %xmm1
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;SSE-NEXT: movaps %xmm1, %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_cmpps_le
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;AVX: vmovaps (%rdi), %xmm1
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;AVX-NEXT: vcmpleps %xmm0, %xmm1, %xmm0
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;AVX-NEXT: retq
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define <4 x i32> @commute_cmpps_le(<4 x float>* %a0, <4 x float> %a1) {
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; SSE-LABEL: commute_cmpps_le:
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; SSE: # BB#0:
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; SSE-NEXT: movaps (%rdi), %xmm1
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; SSE-NEXT: cmpleps %xmm0, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_le:
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; AVX: # BB#0:
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; AVX-NEXT: vmovaps (%rdi), %xmm1
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; AVX-NEXT: vcmpleps %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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%1 = load <4 x float>, <4 x float>* %a0
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%2 = fcmp ole <4 x float> %1, %a1
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%3 = sext <4 x i1> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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define <8 x i32> @commute_cmpps_eq_ymm(<8 x float>* %a0, <8 x float> %a1) #0 {
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;AVX-LABEL: commute_cmpps_eq_ymm
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;AVX: vcmpeqps (%rdi), %ymm0, %ymm0
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;AVX-NEXT: retq
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define <8 x i32> @commute_cmpps_eq_ymm(<8 x float>* %a0, <8 x float> %a1) {
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; SSE-LABEL: commute_cmpps_eq_ymm:
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; SSE: # BB#0:
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; SSE-NEXT: cmpeqps (%rdi), %xmm0
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; SSE-NEXT: cmpeqps 16(%rdi), %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_eq_ymm:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpeqps (%rdi), %ymm0, %ymm0
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; AVX-NEXT: retq
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;
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%1 = load <8 x float>, <8 x float>* %a0
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%2 = fcmp oeq <8 x float> %1, %a1
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%3 = sext <8 x i1> %2 to <8 x i32>
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ret <8 x i32> %3
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}
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define <8 x i32> @commute_cmpps_ne_ymm(<8 x float>* %a0, <8 x float> %a1) #0 {
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;AVX-LABEL: commute_cmpps_ne_ymm
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;AVX: vcmpneqps (%rdi), %ymm0, %ymm0
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;AVX-NEXT: retq
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define <8 x i32> @commute_cmpps_ne_ymm(<8 x float>* %a0, <8 x float> %a1) {
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; SSE-LABEL: commute_cmpps_ne_ymm:
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; SSE: # BB#0:
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; SSE-NEXT: cmpneqps (%rdi), %xmm0
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; SSE-NEXT: cmpneqps 16(%rdi), %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_ne_ymm:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpneqps (%rdi), %ymm0, %ymm0
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; AVX-NEXT: retq
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;
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%1 = load <8 x float>, <8 x float>* %a0
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%2 = fcmp une <8 x float> %1, %a1
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%3 = sext <8 x i1> %2 to <8 x i32>
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ret <8 x i32> %3
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}
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define <8 x i32> @commute_cmpps_ord_ymm(<8 x float>* %a0, <8 x float> %a1) #0 {
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;AVX-LABEL: commute_cmpps_ord_ymm
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;AVX: vcmpordps (%rdi), %ymm0, %ymm0
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;AVX-NEXT: retq
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define <8 x i32> @commute_cmpps_ord_ymm(<8 x float>* %a0, <8 x float> %a1) {
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; SSE-LABEL: commute_cmpps_ord_ymm:
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; SSE: # BB#0:
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; SSE-NEXT: cmpordps (%rdi), %xmm0
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; SSE-NEXT: cmpordps 16(%rdi), %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_ord_ymm:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpordps (%rdi), %ymm0, %ymm0
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; AVX-NEXT: retq
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;
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%1 = load <8 x float>, <8 x float>* %a0
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%2 = fcmp ord <8 x float> %1, %a1
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%3 = sext <8 x i1> %2 to <8 x i32>
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ret <8 x i32> %3
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}
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define <8 x i32> @commute_cmpps_uno_ymm(<8 x float>* %a0, <8 x float> %a1) #0 {
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;AVX-LABEL: commute_cmpps_uno_ymm
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;AVX: vcmpunordps (%rdi), %ymm0, %ymm0
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;AVX-NEXT: retq
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define <8 x i32> @commute_cmpps_uno_ymm(<8 x float>* %a0, <8 x float> %a1) {
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; SSE-LABEL: commute_cmpps_uno_ymm:
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; SSE: # BB#0:
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; SSE-NEXT: cmpunordps (%rdi), %xmm0
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; SSE-NEXT: cmpunordps 16(%rdi), %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_uno_ymm:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpunordps (%rdi), %ymm0, %ymm0
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; AVX-NEXT: retq
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;
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%1 = load <8 x float>, <8 x float>* %a0
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%2 = fcmp uno <8 x float> %1, %a1
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%3 = sext <8 x i1> %2 to <8 x i32>
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ret <8 x i32> %3
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}
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define <8 x i32> @commute_cmpps_lt_ymm(<8 x float>* %a0, <8 x float> %a1) #0 {
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;AVX-LABEL: commute_cmpps_lt_ymm
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;AVX: vmovaps (%rdi), %ymm1
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;AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
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;AVX-NEXT: retq
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define <8 x i32> @commute_cmpps_lt_ymm(<8 x float>* %a0, <8 x float> %a1) {
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; SSE-LABEL: commute_cmpps_lt_ymm:
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; SSE: # BB#0:
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; SSE-NEXT: movaps (%rdi), %xmm2
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; SSE-NEXT: movaps 16(%rdi), %xmm3
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; SSE-NEXT: cmpltps %xmm0, %xmm2
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; SSE-NEXT: cmpltps %xmm1, %xmm3
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; SSE-NEXT: movaps %xmm2, %xmm0
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; SSE-NEXT: movaps %xmm3, %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_lt_ymm:
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; AVX: # BB#0:
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; AVX-NEXT: vmovaps (%rdi), %ymm1
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; AVX-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
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; AVX-NEXT: retq
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;
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%1 = load <8 x float>, <8 x float>* %a0
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%2 = fcmp olt <8 x float> %1, %a1
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%3 = sext <8 x i1> %2 to <8 x i32>
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ret <8 x i32> %3
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}
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define <8 x i32> @commute_cmpps_le_ymm(<8 x float>* %a0, <8 x float> %a1) #0 {
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;AVX-LABEL: commute_cmpps_le_ymm
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;AVX: vmovaps (%rdi), %ymm1
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;AVX-NEXT: vcmpleps %ymm0, %ymm1, %ymm0
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;AVX-NEXT: retq
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define <8 x i32> @commute_cmpps_le_ymm(<8 x float>* %a0, <8 x float> %a1) {
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; SSE-LABEL: commute_cmpps_le_ymm:
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; SSE: # BB#0:
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; SSE-NEXT: movaps (%rdi), %xmm2
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; SSE-NEXT: movaps 16(%rdi), %xmm3
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; SSE-NEXT: cmpleps %xmm0, %xmm2
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; SSE-NEXT: cmpleps %xmm1, %xmm3
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; SSE-NEXT: movaps %xmm2, %xmm0
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; SSE-NEXT: movaps %xmm3, %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmpps_le_ymm:
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; AVX: # BB#0:
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; AVX-NEXT: vmovaps (%rdi), %ymm1
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; AVX-NEXT: vcmpleps %ymm0, %ymm1, %ymm0
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; AVX-NEXT: retq
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;
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%1 = load <8 x float>, <8 x float>* %a0
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%2 = fcmp ole <8 x float> %1, %a1
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%3 = sext <8 x i1> %2 to <8 x i32>
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@ -175,164 +238,226 @@ define <8 x i32> @commute_cmpps_le_ymm(<8 x float>* %a0, <8 x float> %a1) #0 {
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; Only equal/not-equal/ordered/unordered can be safely commuted
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;
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define <2 x i64> @commute_cmppd_eq(<2 x double>* %a0, <2 x double> %a1) #0 {
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;SSE-LABEL: commute_cmppd_eq
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;SSE: cmpeqpd (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_cmppd_eq
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;AVX: vcmpeqpd (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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define <2 x i64> @commute_cmppd_eq(<2 x double>* %a0, <2 x double> %a1) {
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; SSE-LABEL: commute_cmppd_eq:
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; SSE: # BB#0:
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; SSE-NEXT: cmpeqpd (%rdi), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: commute_cmppd_eq:
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; AVX: # BB#0:
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; AVX-NEXT: vcmpeqpd (%rdi), %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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%1 = load <2 x double>, <2 x double>* %a0
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%2 = fcmp oeq <2 x double> %1, %a1
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%3 = sext <2 x i1> %2 to <2 x i64>
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ret <2 x i64> %3
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}
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define <2 x i64> @commute_cmppd_ne(<2 x double>* %a0, <2 x double> %a1) #0 {
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;SSE-LABEL: commute_cmppd_ne
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;SSE: cmpneqpd (%rdi), %xmm0
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;SSE-NEXT: retq
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;AVX-LABEL: commute_cmppd_ne
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;AVX: vcmpneqpd (%rdi), %xmm0, %xmm0
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;AVX-NEXT: retq
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|
||||
define <2 x i64> @commute_cmppd_ne(<2 x double>* %a0, <2 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_ne:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: cmpneqpd (%rdi), %xmm0
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_ne:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vcmpneqpd (%rdi), %xmm0, %xmm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <2 x double>, <2 x double>* %a0
|
||||
%2 = fcmp une <2 x double> %1, %a1
|
||||
%3 = sext <2 x i1> %2 to <2 x i64>
|
||||
ret <2 x i64> %3
|
||||
}
|
||||
|
||||
define <2 x i64> @commute_cmppd_ord(<2 x double>* %a0, <2 x double> %a1) #0 {
|
||||
;SSE-LABEL: commute_cmppd_ord
|
||||
;SSE: cmpordpd (%rdi), %xmm0
|
||||
;SSE-NEXT: retq
|
||||
|
||||
;AVX-LABEL: commute_cmppd_ord
|
||||
;AVX: vcmpordpd (%rdi), %xmm0, %xmm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <2 x i64> @commute_cmppd_ord(<2 x double>* %a0, <2 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_ord:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: cmpordpd (%rdi), %xmm0
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_ord:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vcmpordpd (%rdi), %xmm0, %xmm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <2 x double>, <2 x double>* %a0
|
||||
%2 = fcmp ord <2 x double> %1, %a1
|
||||
%3 = sext <2 x i1> %2 to <2 x i64>
|
||||
ret <2 x i64> %3
|
||||
}
|
||||
|
||||
define <2 x i64> @commute_cmppd_uno(<2 x double>* %a0, <2 x double> %a1) #0 {
|
||||
;SSE-LABEL: commute_cmppd_uno
|
||||
;SSE: cmpunordpd (%rdi), %xmm0
|
||||
;SSE-NEXT: retq
|
||||
|
||||
;AVX-LABEL: commute_cmppd_uno
|
||||
;AVX: vcmpunordpd (%rdi), %xmm0, %xmm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <2 x i64> @commute_cmppd_uno(<2 x double>* %a0, <2 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_uno:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: cmpunordpd (%rdi), %xmm0
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_uno:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vcmpunordpd (%rdi), %xmm0, %xmm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <2 x double>, <2 x double>* %a0
|
||||
%2 = fcmp uno <2 x double> %1, %a1
|
||||
%3 = sext <2 x i1> %2 to <2 x i64>
|
||||
ret <2 x i64> %3
|
||||
}
|
||||
|
||||
define <2 x i64> @commute_cmppd_lt(<2 x double>* %a0, <2 x double> %a1) #0 {
|
||||
;SSE-LABEL: commute_cmppd_lt
|
||||
;SSE: movapd (%rdi), %xmm1
|
||||
;SSE-NEXT: cmpltpd %xmm0, %xmm1
|
||||
;SSE-NEXT: movapd %xmm1, %xmm0
|
||||
;SSE-NEXT: retq
|
||||
|
||||
;AVX-LABEL: commute_cmppd_lt
|
||||
;AVX: vmovapd (%rdi), %xmm1
|
||||
;AVX-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <2 x i64> @commute_cmppd_lt(<2 x double>* %a0, <2 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_lt:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: movapd (%rdi), %xmm1
|
||||
; SSE-NEXT: cmpltpd %xmm0, %xmm1
|
||||
; SSE-NEXT: movapd %xmm1, %xmm0
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_lt:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vmovapd (%rdi), %xmm1
|
||||
; AVX-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <2 x double>, <2 x double>* %a0
|
||||
%2 = fcmp olt <2 x double> %1, %a1
|
||||
%3 = sext <2 x i1> %2 to <2 x i64>
|
||||
ret <2 x i64> %3
|
||||
}
|
||||
|
||||
define <2 x i64> @commute_cmppd_le(<2 x double>* %a0, <2 x double> %a1) #0 {
|
||||
;SSE-LABEL: commute_cmppd_le
|
||||
;SSE: movapd (%rdi), %xmm1
|
||||
;SSE-NEXT: cmplepd %xmm0, %xmm1
|
||||
;SSE-NEXT: movapd %xmm1, %xmm0
|
||||
;SSE-NEXT: retq
|
||||
|
||||
;AVX-LABEL: commute_cmppd_le
|
||||
;AVX: vmovapd (%rdi), %xmm1
|
||||
;AVX-NEXT: vcmplepd %xmm0, %xmm1, %xmm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <2 x i64> @commute_cmppd_le(<2 x double>* %a0, <2 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_le:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: movapd (%rdi), %xmm1
|
||||
; SSE-NEXT: cmplepd %xmm0, %xmm1
|
||||
; SSE-NEXT: movapd %xmm1, %xmm0
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_le:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vmovapd (%rdi), %xmm1
|
||||
; AVX-NEXT: vcmplepd %xmm0, %xmm1, %xmm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <2 x double>, <2 x double>* %a0
|
||||
%2 = fcmp ole <2 x double> %1, %a1
|
||||
%3 = sext <2 x i1> %2 to <2 x i64>
|
||||
ret <2 x i64> %3
|
||||
}
|
||||
|
||||
define <4 x i64> @commute_cmppd_eq_ymmm(<4 x double>* %a0, <4 x double> %a1) #0 {
|
||||
;AVX-LABEL: commute_cmppd_eq
|
||||
;AVX: vcmpeqpd (%rdi), %ymm0, %ymm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <4 x i64> @commute_cmppd_eq_ymmm(<4 x double>* %a0, <4 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_eq_ymmm:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: cmpeqpd (%rdi), %xmm0
|
||||
; SSE-NEXT: cmpeqpd 16(%rdi), %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_eq_ymmm:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vcmpeqpd (%rdi), %ymm0, %ymm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <4 x double>, <4 x double>* %a0
|
||||
%2 = fcmp oeq <4 x double> %1, %a1
|
||||
%3 = sext <4 x i1> %2 to <4 x i64>
|
||||
ret <4 x i64> %3
|
||||
}
|
||||
|
||||
define <4 x i64> @commute_cmppd_ne_ymmm(<4 x double>* %a0, <4 x double> %a1) #0 {
|
||||
;AVX-LABEL: commute_cmppd_ne
|
||||
;AVX: vcmpneqpd (%rdi), %ymm0, %ymm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <4 x i64> @commute_cmppd_ne_ymmm(<4 x double>* %a0, <4 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_ne_ymmm:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: cmpneqpd (%rdi), %xmm0
|
||||
; SSE-NEXT: cmpneqpd 16(%rdi), %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_ne_ymmm:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vcmpneqpd (%rdi), %ymm0, %ymm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <4 x double>, <4 x double>* %a0
|
||||
%2 = fcmp une <4 x double> %1, %a1
|
||||
%3 = sext <4 x i1> %2 to <4 x i64>
|
||||
ret <4 x i64> %3
|
||||
}
|
||||
|
||||
define <4 x i64> @commute_cmppd_ord_ymmm(<4 x double>* %a0, <4 x double> %a1) #0 {
|
||||
;AVX-LABEL: commute_cmppd_ord
|
||||
;AVX: vcmpordpd (%rdi), %ymm0, %ymm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <4 x i64> @commute_cmppd_ord_ymmm(<4 x double>* %a0, <4 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_ord_ymmm:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: cmpordpd (%rdi), %xmm0
|
||||
; SSE-NEXT: cmpordpd 16(%rdi), %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_ord_ymmm:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vcmpordpd (%rdi), %ymm0, %ymm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <4 x double>, <4 x double>* %a0
|
||||
%2 = fcmp ord <4 x double> %1, %a1
|
||||
%3 = sext <4 x i1> %2 to <4 x i64>
|
||||
ret <4 x i64> %3
|
||||
}
|
||||
|
||||
define <4 x i64> @commute_cmppd_uno_ymmm(<4 x double>* %a0, <4 x double> %a1) #0 {
|
||||
;AVX-LABEL: commute_cmppd_uno
|
||||
;AVX: vcmpunordpd (%rdi), %ymm0, %ymm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <4 x i64> @commute_cmppd_uno_ymmm(<4 x double>* %a0, <4 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_uno_ymmm:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: cmpunordpd (%rdi), %xmm0
|
||||
; SSE-NEXT: cmpunordpd 16(%rdi), %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_uno_ymmm:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vcmpunordpd (%rdi), %ymm0, %ymm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <4 x double>, <4 x double>* %a0
|
||||
%2 = fcmp uno <4 x double> %1, %a1
|
||||
%3 = sext <4 x i1> %2 to <4 x i64>
|
||||
ret <4 x i64> %3
|
||||
}
|
||||
|
||||
define <4 x i64> @commute_cmppd_lt_ymmm(<4 x double>* %a0, <4 x double> %a1) #0 {
|
||||
;AVX-LABEL: commute_cmppd_lt
|
||||
;AVX: vmovapd (%rdi), %ymm1
|
||||
;AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <4 x i64> @commute_cmppd_lt_ymmm(<4 x double>* %a0, <4 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_lt_ymmm:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: movapd (%rdi), %xmm2
|
||||
; SSE-NEXT: movapd 16(%rdi), %xmm3
|
||||
; SSE-NEXT: cmpltpd %xmm0, %xmm2
|
||||
; SSE-NEXT: cmpltpd %xmm1, %xmm3
|
||||
; SSE-NEXT: movapd %xmm2, %xmm0
|
||||
; SSE-NEXT: movapd %xmm3, %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_lt_ymmm:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vmovapd (%rdi), %ymm1
|
||||
; AVX-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <4 x double>, <4 x double>* %a0
|
||||
%2 = fcmp olt <4 x double> %1, %a1
|
||||
%3 = sext <4 x i1> %2 to <4 x i64>
|
||||
ret <4 x i64> %3
|
||||
}
|
||||
|
||||
define <4 x i64> @commute_cmppd_le_ymmm(<4 x double>* %a0, <4 x double> %a1) #0 {
|
||||
;AVX-LABEL: commute_cmppd_le
|
||||
;AVX: vmovapd (%rdi), %ymm1
|
||||
;AVX-NEXT: vcmplepd %ymm0, %ymm1, %ymm0
|
||||
;AVX-NEXT: retq
|
||||
|
||||
define <4 x i64> @commute_cmppd_le_ymmm(<4 x double>* %a0, <4 x double> %a1) {
|
||||
; SSE-LABEL: commute_cmppd_le_ymmm:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: movapd (%rdi), %xmm2
|
||||
; SSE-NEXT: movapd 16(%rdi), %xmm3
|
||||
; SSE-NEXT: cmplepd %xmm0, %xmm2
|
||||
; SSE-NEXT: cmplepd %xmm1, %xmm3
|
||||
; SSE-NEXT: movapd %xmm2, %xmm0
|
||||
; SSE-NEXT: movapd %xmm3, %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: commute_cmppd_le_ymmm:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vmovapd (%rdi), %ymm1
|
||||
; AVX-NEXT: vcmplepd %ymm0, %ymm1, %ymm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
%1 = load <4 x double>, <4 x double>* %a0
|
||||
%2 = fcmp ole <4 x double> %1, %a1
|
||||
%3 = sext <4 x i1> %2 to <4 x i64>
|
||||
|
||||
Loading…
Reference in New Issue
Block a user