RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-12-15 07:59:50 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

support IDEF, fnegabs (thanks sampo)

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21023 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duraid Madina 2005-04-02 10:33:53 +00:00
parent 5c156b7473
commit 75c9fcbdcc
1 changed files with 14 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
lib/Target/IA64/IA64ISelPattern.cpp
View File

@ -610,6 +610,11 @@ unsigned ISel::SelectExpr(SDOperand N) {
return Result; return Result;
} }
case ISD::UNDEF: {
BuildMI(BB, IA64::IDEF, 0, Result);
return Result;
}
case ISD::GlobalAddress: { case ISD::GlobalAddress: {
GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal(); GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
unsigned Tmp1 = MakeReg(MVT::i64); unsigned Tmp1 = MakeReg(MVT::i64);
@ -799,9 +804,16 @@ assert(0 && "hmm, ISD::SIGN_EXTEND: shouldn't ever be reached. bad luck!\n");
} }
case ISD::FNEG: { case ISD::FNEG: {
Tmp1 = SelectExpr(N.getOperand(0));
assert(DestType == MVT::f64 && "trying to fneg something other than f64?"); assert(DestType == MVT::f64 && "trying to fneg something other than f64?");
BuildMI(BB, IA64::FNEG, 1, Result).addReg(Tmp1);
if (ISD::FABS == N.getOperand(0).getOpcode()) { // && hasOneUse()?
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
BuildMI(BB, IA64::FNEGABS, 1, Result).addReg(Tmp1); // fold in abs
} else {
Tmp1 = SelectExpr(N.getOperand(0));
BuildMI(BB, IA64::FNEG, 1, Result).addReg(Tmp1); // plain old fneg
}
return Result; return Result;
} }