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[AVX-512] Begin giving the disassembler a way to recognize that VSIB is a different encoding than regular addressing modes.

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This part first teaches it not to check error if EVEX.V2 is used by a VSIB instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292093 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2017-01-16 05:44:25 +00:00
parent 37b9de5028
commit 75deb64c6f
4 changed files with 40 additions and 15 deletions
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1
lib/Target/X86/Disassembler/X86Disassembler.cpp
View File

@ -992,6 +992,7 @@ static bool translateOperand(MCInst &mcInst, const OperandSpecifier &operand,
case ENCODING_WRITEMASK:
return translateMaskRegister(mcInst, insn.writemask);
CASE_ENCODING_RM:
CASE_ENCODING_VSIB:
return translateRM(mcInst, operand, insn, Dis);
case ENCODING_IB:
case ENCODING_IW:

6
lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
View File

@ -1562,6 +1562,7 @@ static int fixupReg(struct InternalInstruction *insn,
return -1;
break;
CASE_ENCODING_RM:
CASE_ENCODING_VSIB:
if (insn->eaBase >= insn->eaRegBase) {
insn->eaBase = (EABase)fixupRMValue(insn,
(OperandType)op->type,
@ -1753,6 +1754,11 @@ static int readOperands(struct InternalInstruction* insn) {
case ENCODING_SI:
case ENCODING_DI:
break;
CASE_ENCODING_VSIB:
// VSIB can use the V2 bit so check only the other bits.
if (needVVVV)
needVVVV = hasVVVV & ((insn->vvvv & 0xf) != 0);
// fallthrough
case ENCODING_REG:
CASE_ENCODING_RM:
if (readModRM(insn))

16
lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
View File

@ -339,6 +339,15 @@ enum ModRMDecisionType {
case ENCODING_RM_CD32: \
case ENCODING_RM_CD64
#define CASE_ENCODING_VSIB \
case ENCODING_VSIB: \
case ENCODING_VSIB_CD2: \
case ENCODING_VSIB_CD4: \
case ENCODING_VSIB_CD8: \
case ENCODING_VSIB_CD16: \
case ENCODING_VSIB_CD32: \
case ENCODING_VSIB_CD64
// Physical encodings of instruction operands.
#define ENCODINGS \
ENUM_ENTRY(ENCODING_NONE, "") \
@ -350,6 +359,13 @@ enum ModRMDecisionType {
ENUM_ENTRY(ENCODING_RM_CD16,"R/M operand with CDisp scaling of 16") \
ENUM_ENTRY(ENCODING_RM_CD32,"R/M operand with CDisp scaling of 32") \
ENUM_ENTRY(ENCODING_RM_CD64,"R/M operand with CDisp scaling of 64") \
ENUM_ENTRY(ENCODING_VSIB, "VSIB operand in ModR/M byte.") \
ENUM_ENTRY(ENCODING_VSIB_CD2, "VSIB operand with CDisp scaling of 2") \
ENUM_ENTRY(ENCODING_VSIB_CD4, "VSIB operand with CDisp scaling of 4") \
ENUM_ENTRY(ENCODING_VSIB_CD8, "VSIB operand with CDisp scaling of 8") \
ENUM_ENTRY(ENCODING_VSIB_CD16,"VSIB operand with CDisp scaling of 16") \
ENUM_ENTRY(ENCODING_VSIB_CD32,"VSIB operand with CDisp scaling of 32") \
ENUM_ENTRY(ENCODING_VSIB_CD64,"VSIB operand with CDisp scaling of 64") \
ENUM_ENTRY(ENCODING_VVVV, "Register operand in VEX.vvvv byte.") \
ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.") \
ENUM_ENTRY(ENCODING_IB, "1-byte immediate") \

32
utils/TableGen/X86RecognizableInstr.cpp
View File

@ -457,10 +457,12 @@ void RecognizableInstr::adjustOperandEncoding(OperandEncoding &encoding) {
// The scaling factor for AVX512 compressed displacement encoding is an
// instruction attribute. Adjust the ModRM encoding type to include the
// scale for compressed displacement.
if (encoding != ENCODING_RM || CD8_Scale == 0)
if ((encoding != ENCODING_RM && encoding != ENCODING_VSIB) ||CD8_Scale == 0)
return;
encoding = (OperandEncoding)(encoding + Log2_32(CD8_Scale));
assert(encoding <= ENCODING_RM_CD64 && "Invalid CDisp scaling");
assert(((encoding >= ENCODING_RM && encoding <= ENCODING_RM_CD64) ||
(encoding >= ENCODING_VSIB && encoding <= ENCODING_VSIB_CD64)) &&
"Invalid CDisp scaling");
}
void RecognizableInstr::handleOperand(bool optional, unsigned &operandIndex,
@ -1243,19 +1245,19 @@ RecognizableInstr::memoryEncodingFromString(const std::string &s,
ENCODING("opaque48mem", ENCODING_RM)
ENCODING("opaque80mem", ENCODING_RM)
ENCODING("opaque512mem", ENCODING_RM)
ENCODING("vx64mem", ENCODING_RM)
ENCODING("vx128mem", ENCODING_RM)
ENCODING("vx256mem", ENCODING_RM)
ENCODING("vy128mem", ENCODING_RM)
ENCODING("vy256mem", ENCODING_RM)
ENCODING("vx64xmem", ENCODING_RM)
ENCODING("vx128xmem", ENCODING_RM)
ENCODING("vx256xmem", ENCODING_RM)
ENCODING("vy128xmem", ENCODING_RM)
ENCODING("vy256xmem", ENCODING_RM)
ENCODING("vy512mem", ENCODING_RM)
ENCODING("vz256xmem", ENCODING_RM)
ENCODING("vz512mem", ENCODING_RM)
ENCODING("vx64mem", ENCODING_VSIB)
ENCODING("vx128mem", ENCODING_VSIB)
ENCODING("vx256mem", ENCODING_VSIB)
ENCODING("vy128mem", ENCODING_VSIB)
ENCODING("vy256mem", ENCODING_VSIB)
ENCODING("vx64xmem", ENCODING_VSIB)
ENCODING("vx128xmem", ENCODING_VSIB)
ENCODING("vx256xmem", ENCODING_VSIB)
ENCODING("vy128xmem", ENCODING_VSIB)
ENCODING("vy256xmem", ENCODING_VSIB)
ENCODING("vy512mem", ENCODING_VSIB)
ENCODING("vz256xmem", ENCODING_VSIB)
ENCODING("vz512mem", ENCODING_VSIB)
errs() << "Unhandled memory encoding " << s << "\n";
llvm_unreachable("Unhandled memory encoding");
}