diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 1e902bac94d..d8c14da15dc 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -337,6 +337,7 @@ namespace {
     SDValue visitShiftByConstant(SDNode *N, ConstantSDNode *Amt);
 
     SDValue foldSelectOfConstants(SDNode *N);
+    SDValue foldBinOpIntoSelect(SDNode *BO);
     bool SimplifySelectOps(SDNode *SELECT, SDValue LHS, SDValue RHS);
     SDValue SimplifyBinOpWithSameOpcodeHands(SDNode *N);
     SDValue SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2);
@@ -1747,6 +1748,59 @@ static ConstantSDNode *getAsNonOpaqueConstant(SDValue N) {
   return Const != nullptr && !Const->isOpaque() ? Const : nullptr;
 }
 
+SDValue DAGCombiner::foldBinOpIntoSelect(SDNode *BO) {
+  auto BinOpcode = BO->getOpcode();
+  assert((BinOpcode == ISD::ADD || BinOpcode == ISD::SUB ||
+          BinOpcode == ISD::MUL || BinOpcode == ISD::SDIV ||
+          BinOpcode == ISD::UDIV || BinOpcode == ISD::SREM ||
+          BinOpcode == ISD::UREM || BinOpcode == ISD::AND ||
+          BinOpcode == ISD::OR || BinOpcode == ISD::XOR ||
+          BinOpcode == ISD::SHL || BinOpcode == ISD::SRL ||
+          BinOpcode == ISD::SRA || BinOpcode == ISD::FADD ||
+          BinOpcode == ISD::FSUB || BinOpcode == ISD::FMUL ||
+          BinOpcode == ISD::FDIV || BinOpcode == ISD::FREM) &&
+         "Unexpected binary operator");
+
+  SDValue C1 = BO->getOperand(1);
+  if (!isConstantOrConstantVector(C1) &&
+      !isConstantFPBuildVectorOrConstantFP(C1))
+    return SDValue();
+
+  // Don't do this unless the old select is going away. We want to eliminate the
+  // binary operator, not replace a binop with a select.
+  // TODO: Handle ISD::SELECT_CC.
+  SDValue Sel = BO->getOperand(0);
+  if (Sel.getOpcode() != ISD::SELECT || !Sel.hasOneUse())
+    return SDValue();
+
+  SDValue CT = Sel.getOperand(1);
+  if (!isConstantOrConstantVector(CT) &&
+      !isConstantFPBuildVectorOrConstantFP(CT))
+    return SDValue();
+
+  SDValue CF = Sel.getOperand(2);
+  if (!isConstantOrConstantVector(CF) &&
+      !isConstantFPBuildVectorOrConstantFP(CF))
+    return SDValue();
+
+  // We have a select-of-constants followed by a binary operator with a
+  // constant. Eliminate the binop by pulling the constant math into the select.
+  // Example: add (select Cond, CT, CF), C1 --> select Cond, CT + C1, CF + C1
+  EVT VT = Sel.getValueType();
+  SDLoc DL(Sel);
+  SDValue NewCT = DAG.getNode(BinOpcode, DL, VT, CT, C1);
+  assert((isConstantOrConstantVector(NewCT) ||
+          isConstantFPBuildVectorOrConstantFP(NewCT)) &&
+         "Failed to constant fold a binop with constant operands");
+
+  SDValue NewCF = DAG.getNode(BinOpcode, DL, VT, CF, C1);
+  assert((isConstantOrConstantVector(NewCF) ||
+          isConstantFPBuildVectorOrConstantFP(NewCF)) &&
+         "Failed to constant fold a binop with constant operands");
+
+  return DAG.getSelect(DL, VT, Sel.getOperand(0), NewCT, NewCF);
+}
+
 SDValue DAGCombiner::visitADD(SDNode *N) {
   SDValue N0 = N->getOperand(0);
   SDValue N1 = N->getOperand(1);
@@ -1795,6 +1849,9 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
       }
   }
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // reassociate add
   if (SDValue RADD = ReassociateOps(ISD::ADD, DL, N0, N1))
     return RADD;
@@ -1999,6 +2056,9 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
                                       N1.getNode());
   }
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   ConstantSDNode *N1C = getAsNonOpaqueConstant(N1);
 
   // fold (sub x, c) -> (add x, -c)
@@ -2210,6 +2270,10 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
   // fold (mul x, 1) -> x
   if (N1IsConst && ConstValue1 == 1 && IsFullSplat)
     return N0;
+
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // fold (mul x, -1) -> 0-x
   if (N1IsConst && ConstValue1.isAllOnesValue()) {
     SDLoc DL(N);
@@ -2401,6 +2465,9 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) {
     return DAG.getNode(ISD::SUB, DL, VT,
                        DAG.getConstant(0, DL, VT), N0);
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // If we know the sign bits of both operands are zero, strength reduce to a
   // udiv instead.  Handles (X&15) /s 4 -> X&15 >> 2
   if (DAG.SignBitIsZero(N1) && DAG.SignBitIsZero(N0))
@@ -2493,6 +2560,9 @@ SDValue DAGCombiner::visitUDIV(SDNode *N) {
                                                     N0C, N1C))
       return Folded;
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // fold (udiv x, (1 << c)) -> x >>u c
   if (isConstantOrConstantVector(N1, /*NoOpaques*/ true) &&
       DAG.isKnownToBeAPowerOfTwo(N1)) {
@@ -2561,6 +2631,9 @@ SDValue DAGCombiner::visitREM(SDNode *N) {
     if (SDValue Folded = DAG.FoldConstantArithmetic(Opcode, DL, VT, N0C, N1C))
       return Folded;
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   if (isSigned) {
     // If we know the sign bits of both operands are zero, strength reduce to a
     // urem instead.  Handles (X & 0x0FFFFFFF) %s 16 -> X&15
@@ -3267,6 +3340,10 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
   if (N1C && DAG.MaskedValueIsZero(SDValue(N, 0),
                                    APInt::getAllOnesValue(BitWidth)))
     return DAG.getConstant(0, SDLoc(N), VT);
+
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // reassociate and
   if (SDValue RAND = ReassociateOps(ISD::AND, SDLoc(N), N0, N1))
     return RAND;
@@ -4008,6 +4085,10 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
   // fold (or x, -1) -> -1
   if (isAllOnesConstant(N1))
     return N1;
+
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // fold (or x, c) -> c iff (x & ~c) == 0
   if (N1C && DAG.MaskedValueIsZero(N0, ~N1C->getAPIntValue()))
     return N1;
@@ -4753,6 +4834,10 @@ SDValue DAGCombiner::visitXOR(SDNode *N) {
   // fold (xor x, 0) -> x
   if (isNullConstant(N1))
     return N0;
+
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // reassociate xor
   if (SDValue RXOR = ReassociateOps(ISD::XOR, SDLoc(N), N0, N1))
     return RXOR;
@@ -5040,6 +5125,10 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
   // fold (shl undef, x) -> 0
   if (N0.isUndef())
     return DAG.getConstant(0, SDLoc(N), VT);
+
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // if (shl x, c) is known to be zero, return 0
   if (DAG.MaskedValueIsZero(SDValue(N, 0),
                             APInt::getAllOnesValue(OpSizeInBits)))
@@ -5243,6 +5332,10 @@ SDValue DAGCombiner::visitSRA(SDNode *N) {
   // fold (sra x, 0) -> x
   if (N1C && N1C->isNullValue())
     return N0;
+
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // fold (sra (shl x, c1), c1) -> sext_inreg for some c1 and target supports
   // sext_inreg.
   if (N1C && N0.getOpcode() == ISD::SHL && N1 == N0.getOperand(1)) {
@@ -5390,6 +5483,10 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
   // fold (srl x, 0) -> x
   if (N1C && N1C->isNullValue())
     return N0;
+
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // if (srl x, c) is known to be zero, return 0
   if (N1C && DAG.MaskedValueIsZero(SDValue(N, 0),
                                    APInt::getAllOnesValue(OpSizeInBits)))
@@ -9064,6 +9161,9 @@ SDValue DAGCombiner::visitFADD(SDNode *N) {
   if (N0CFP && !N1CFP)
     return DAG.getNode(ISD::FADD, DL, VT, N1, N0, Flags);
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // fold (fadd A, (fneg B)) -> (fsub A, B)
   if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) &&
       isNegatibleForFree(N1, LegalOperations, TLI, &Options) == 2)
@@ -9211,6 +9311,9 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
   if (N0CFP && N1CFP)
     return DAG.getNode(ISD::FSUB, DL, VT, N0, N1, Flags);
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   // fold (fsub A, (fneg B)) -> (fadd A, B)
   if (isNegatibleForFree(N1, LegalOperations, TLI, &Options))
     return DAG.getNode(ISD::FADD, DL, VT, N0,
@@ -9290,6 +9393,9 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) {
   if (N1CFP && N1CFP->isExactlyValue(1.0))
     return N0;
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   if (Options.UnsafeFPMath) {
     // fold (fmul A, 0) -> 0
     if (N1CFP && N1CFP->isZero())
@@ -9544,6 +9650,9 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) {
   if (N0CFP && N1CFP)
     return DAG.getNode(ISD::FDIV, SDLoc(N), VT, N0, N1, Flags);
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   if (Options.UnsafeFPMath) {
     // fold (fdiv X, c2) -> fmul X, 1/c2 if losing precision is acceptable.
     if (N1CFP) {
@@ -9647,6 +9756,9 @@ SDValue DAGCombiner::visitFREM(SDNode *N) {
     return DAG.getNode(ISD::FREM, SDLoc(N), VT, N0, N1,
                        &cast<BinaryWithFlagsSDNode>(N)->Flags);
 
+  if (SDValue NewSel = foldBinOpIntoSelect(N))
+    return NewSel;
+
   return SDValue();
 }
 
diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll
index 8c1502e1465..09e8ed4bc09 100644
--- a/test/CodeGen/ARM/select_xform.ll
+++ b/test/CodeGen/ARM/select_xform.ll
@@ -223,21 +223,19 @@ entry:
   ret i32 %add
 }
 
-; Do not fold the xor into the select
+; Fold the xor into the select.
 define i32 @t15(i32 %p) {
 entry:
 ; ARM-LABEL: t15:
-; ARM: mov     [[REG:r[0-9]+]], #2
+; ARM: mov     [[REG:r[0-9]+]], #3
 ; ARM: cmp     r0, #8
-; ARM: movwgt  [[REG:r[0-9]+]], #1
-; ARM: eor     r0, [[REG:r[0-9]+]], #1
+; ARM: movwgt  [[REG:r[0-9]+]], #0
 
 ; T2-LABEL: t15:
-; T2: movs    [[REG:r[0-9]+]], #2
+; T2: movs    [[REG:r[0-9]+]], #3
 ; T2: cmp     [[REG:r[0-9]+]], #8
 ; T2: it      gt
-; T2: movgt   [[REG:r[0-9]+]], #1
-; T2: eor     r0, [[REG:r[0-9]+]], #1
+; T2: movgt   [[REG:r[0-9]+]], #0
   %cmp = icmp sgt i32 %p, 8
   %a = select i1 %cmp, i32 1, i32 2
   %xor = xor i32 %a, 1
diff --git a/test/CodeGen/PowerPC/select_const.ll b/test/CodeGen/PowerPC/select_const.ll
index a7eabfc76e4..142a482bcc1 100644
--- a/test/CodeGen/PowerPC/select_const.ll
+++ b/test/CodeGen/PowerPC/select_const.ll
@@ -435,23 +435,20 @@ define i8 @sel_constants_add_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_add_constant:
 ; ISEL:       # BB#0:
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    li 3, 23
+; ISEL-NEXT:    li 4, 1
+; ISEL-NEXT:    li 3, 28
 ; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    addi 3, 3, 5
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_add_constant:
 ; NO_ISEL:       # BB#0:
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    li 3, 23
+; NO_ISEL-NEXT:    li 4, 1
+; NO_ISEL-NEXT:    li 3, 28
 ; NO_ISEL-NEXT:    bc 12, 1, .LBB21_1
-; NO_ISEL-NEXT:    b .LBB21_2
+; NO_ISEL-NEXT:    blr
 ; NO_ISEL-NEXT:  .LBB21_1:
 ; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB21_2:
-; NO_ISEL-NEXT:    addi 3, 3, 5
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = add i8 %sel, 5
@@ -461,24 +458,24 @@ define i8 @sel_constants_add_constant(i1 %cond) {
 define i8 @sel_constants_sub_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_sub_constant:
 ; ISEL:       # BB#0:
+; ISEL-NEXT:    li 4, 0
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    li 3, 23
-; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    addi 3, 3, -5
+; ISEL-NEXT:    oris 3, 4, 65535
+; ISEL-NEXT:    li 4, 18
+; ISEL-NEXT:    ori 3, 3, 65527
+; ISEL-NEXT:    isel 3, 3, 4, 1
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_sub_constant:
 ; NO_ISEL:       # BB#0:
+; NO_ISEL-NEXT:    li 4, 0
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    li 3, 23
-; NO_ISEL-NEXT:    bc 12, 1, .LBB22_1
-; NO_ISEL-NEXT:    b .LBB22_2
-; NO_ISEL-NEXT:  .LBB22_1:
-; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB22_2:
-; NO_ISEL-NEXT:    addi 3, 3, -5
+; NO_ISEL-NEXT:    oris 3, 4, 65535
+; NO_ISEL-NEXT:    li 4, 18
+; NO_ISEL-NEXT:    ori 3, 3, 65527
+; NO_ISEL-NEXT:    bclr 12, 1, 0
+; NO_ISEL-NEXT:  # BB#1:
+; NO_ISEL-NEXT:    ori 3, 4, 0
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = sub i8 %sel, 5
@@ -488,24 +485,24 @@ define i8 @sel_constants_sub_constant(i1 %cond) {
 define i8 @sel_constants_mul_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_mul_constant:
 ; ISEL:       # BB#0:
+; ISEL-NEXT:    lis 4, 16383
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    li 3, 23
-; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    mulli 3, 3, 5
+; ISEL-NEXT:    ori 3, 4, 65531
+; ISEL-NEXT:    li 4, 115
+; ISEL-NEXT:    sldi 3, 3, 2
+; ISEL-NEXT:    isel 3, 3, 4, 1
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_mul_constant:
 ; NO_ISEL:       # BB#0:
+; NO_ISEL-NEXT:    lis 4, 16383
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    li 3, 23
-; NO_ISEL-NEXT:    bc 12, 1, .LBB23_1
-; NO_ISEL-NEXT:    b .LBB23_2
-; NO_ISEL-NEXT:  .LBB23_1:
-; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB23_2:
-; NO_ISEL-NEXT:    mulli 3, 3, 5
+; NO_ISEL-NEXT:    ori 3, 4, 65531
+; NO_ISEL-NEXT:    li 4, 115
+; NO_ISEL-NEXT:    sldi 3, 3, 2
+; NO_ISEL-NEXT:    bclr 12, 1, 0
+; NO_ISEL-NEXT:  # BB#1:
+; NO_ISEL-NEXT:    ori 3, 4, 0
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = mul i8 %sel, 5
@@ -516,33 +513,18 @@ define i8 @sel_constants_sdiv_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_sdiv_constant:
 ; ISEL:       # BB#0:
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    lis 5, 26214
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    li 3, 23
-; ISEL-NEXT:    ori 12, 5, 26215
-; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    mulld 3, 3, 12
-; ISEL-NEXT:    rldicl 4, 3, 1, 63
-; ISEL-NEXT:    sradi 3, 3, 33
-; ISEL-NEXT:    add 3, 3, 4
+; ISEL-NEXT:    li 3, 4
+; ISEL-NEXT:    isel 3, 0, 3, 1
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_sdiv_constant:
 ; NO_ISEL:       # BB#0:
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    lis 5, 26214
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    li 3, 23
-; NO_ISEL-NEXT:    ori 12, 5, 26215
+; NO_ISEL-NEXT:    li 3, 4
 ; NO_ISEL-NEXT:    bc 12, 1, .LBB24_1
-; NO_ISEL-NEXT:    b .LBB24_2
+; NO_ISEL-NEXT:    blr
 ; NO_ISEL-NEXT:  .LBB24_1:
-; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB24_2:
-; NO_ISEL-NEXT:    mulld 3, 3, 12
-; NO_ISEL-NEXT:    rldicl 4, 3, 1, 63
-; NO_ISEL-NEXT:    sradi 3, 3, 33
-; NO_ISEL-NEXT:    add 3, 3, 4
+; NO_ISEL-NEXT:    addi 3, 0, 0
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = sdiv i8 %sel, 5
@@ -552,38 +534,21 @@ define i8 @sel_constants_sdiv_constant(i1 %cond) {
 define i8 @sel_constants_udiv_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_udiv_constant:
 ; ISEL:       # BB#0:
-; ISEL-NEXT:    lis 4, 16383
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 5, 0
-; ISEL-NEXT:    ori 3, 4, 65535
-; ISEL-NEXT:    li 4, 23
-; ISEL-NEXT:    oris 12, 5, 52428
-; ISEL-NEXT:    sldi 3, 3, 2
-; ISEL-NEXT:    isel 3, 3, 4, 1
-; ISEL-NEXT:    ori 4, 12, 52429
-; ISEL-NEXT:    clrldi 3, 3, 56
-; ISEL-NEXT:    mulld 3, 3, 4
-; ISEL-NEXT:    rldicl 3, 3, 30, 34
+; ISEL-NEXT:    li 4, 50
+; ISEL-NEXT:    li 3, 4
+; ISEL-NEXT:    isel 3, 4, 3, 1
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_udiv_constant:
 ; NO_ISEL:       # BB#0:
-; NO_ISEL-NEXT:    lis 4, 16383
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 5, 0
-; NO_ISEL-NEXT:    ori 3, 4, 65535
-; NO_ISEL-NEXT:    li 4, 23
-; NO_ISEL-NEXT:    oris 12, 5, 52428
-; NO_ISEL-NEXT:    sldi 3, 3, 2
-; NO_ISEL-NEXT:    bc 12, 1, .LBB25_2
-; NO_ISEL-NEXT:  # BB#1:
-; NO_ISEL-NEXT:    ori 3, 4, 0
-; NO_ISEL-NEXT:    b .LBB25_2
-; NO_ISEL-NEXT:  .LBB25_2:
-; NO_ISEL-NEXT:    ori 4, 12, 52429
-; NO_ISEL-NEXT:    clrldi 3, 3, 56
-; NO_ISEL-NEXT:    mulld 3, 3, 4
-; NO_ISEL-NEXT:    rldicl 3, 3, 30, 34
+; NO_ISEL-NEXT:    li 4, 50
+; NO_ISEL-NEXT:    li 3, 4
+; NO_ISEL-NEXT:    bc 12, 1, .LBB25_1
+; NO_ISEL-NEXT:    blr
+; NO_ISEL-NEXT:  .LBB25_1:
+; NO_ISEL-NEXT:    addi 3, 4, 0
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = udiv i8 %sel, 5
@@ -593,40 +558,24 @@ define i8 @sel_constants_udiv_constant(i1 %cond) {
 define i8 @sel_constants_srem_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_srem_constant:
 ; ISEL:       # BB#0:
+; ISEL-NEXT:    lis 4, 16383
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    lis 12, 26214
-; ISEL-NEXT:    li 3, 23
-; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    ori 4, 12, 26215
-; ISEL-NEXT:    extsw 3, 3
-; ISEL-NEXT:    mulld 4, 3, 4
-; ISEL-NEXT:    rldicl 5, 4, 1, 63
-; ISEL-NEXT:    sradi 4, 4, 33
-; ISEL-NEXT:    add 4, 4, 5
-; ISEL-NEXT:    mulli 4, 4, 5
-; ISEL-NEXT:    subf 3, 4, 3
+; ISEL-NEXT:    ori 3, 4, 65535
+; ISEL-NEXT:    li 4, 3
+; ISEL-NEXT:    sldi 3, 3, 2
+; ISEL-NEXT:    isel 3, 3, 4, 1
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_srem_constant:
 ; NO_ISEL:       # BB#0:
+; NO_ISEL-NEXT:    lis 4, 16383
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    lis 12, 26214
-; NO_ISEL-NEXT:    li 3, 23
-; NO_ISEL-NEXT:    bc 12, 1, .LBB26_1
-; NO_ISEL-NEXT:    b .LBB26_2
-; NO_ISEL-NEXT:  .LBB26_1:
-; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB26_2:
-; NO_ISEL-NEXT:    ori 4, 12, 26215
-; NO_ISEL-NEXT:    extsw 3, 3
-; NO_ISEL-NEXT:    mulld 4, 3, 4
-; NO_ISEL-NEXT:    rldicl 5, 4, 1, 63
-; NO_ISEL-NEXT:    sradi 4, 4, 33
-; NO_ISEL-NEXT:    add 4, 4, 5
-; NO_ISEL-NEXT:    mulli 4, 4, 5
-; NO_ISEL-NEXT:    subf 3, 4, 3
+; NO_ISEL-NEXT:    ori 3, 4, 65535
+; NO_ISEL-NEXT:    li 4, 3
+; NO_ISEL-NEXT:    sldi 3, 3, 2
+; NO_ISEL-NEXT:    bclr 12, 1, 0
+; NO_ISEL-NEXT:  # BB#1:
+; NO_ISEL-NEXT:    ori 3, 4, 0
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = srem i8 %sel, 5
@@ -637,39 +586,20 @@ define i8 @sel_constants_urem_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_urem_constant:
 ; ISEL:       # BB#0:
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    li 12, 0
-; ISEL-NEXT:    li 3, 23
+; ISEL-NEXT:    li 4, 2
+; ISEL-NEXT:    li 3, 3
 ; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    oris 4, 12, 52428
-; ISEL-NEXT:    rlwinm 3, 3, 0, 24, 31
-; ISEL-NEXT:    ori 4, 4, 52429
-; ISEL-NEXT:    clrldi 5, 3, 32
-; ISEL-NEXT:    mulld 4, 5, 4
-; ISEL-NEXT:    rldicl 4, 4, 30, 34
-; ISEL-NEXT:    mulli 4, 4, 5
-; ISEL-NEXT:    subf 3, 4, 3
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_urem_constant:
 ; NO_ISEL:       # BB#0:
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    li 12, 0
-; NO_ISEL-NEXT:    li 3, 23
+; NO_ISEL-NEXT:    li 4, 2
+; NO_ISEL-NEXT:    li 3, 3
 ; NO_ISEL-NEXT:    bc 12, 1, .LBB27_1
-; NO_ISEL-NEXT:    b .LBB27_2
+; NO_ISEL-NEXT:    blr
 ; NO_ISEL-NEXT:  .LBB27_1:
 ; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB27_2:
-; NO_ISEL-NEXT:    oris 4, 12, 52428
-; NO_ISEL-NEXT:    rlwinm 3, 3, 0, 24, 31
-; NO_ISEL-NEXT:    ori 4, 4, 52429
-; NO_ISEL-NEXT:    clrldi 5, 3, 32
-; NO_ISEL-NEXT:    mulld 4, 5, 4
-; NO_ISEL-NEXT:    rldicl 4, 4, 30, 34
-; NO_ISEL-NEXT:    mulli 4, 4, 5
-; NO_ISEL-NEXT:    subf 3, 4, 3
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = urem i8 %sel, 5
@@ -679,28 +609,21 @@ define i8 @sel_constants_urem_constant(i1 %cond) {
 define i8 @sel_constants_and_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_and_constant:
 ; ISEL:       # BB#0:
-; ISEL-NEXT:    lis 4, 16383
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    ori 3, 4, 65535
-; ISEL-NEXT:    li 4, 23
-; ISEL-NEXT:    sldi 3, 3, 2
-; ISEL-NEXT:    isel 3, 3, 4, 1
-; ISEL-NEXT:    andi. 3, 3, 5
+; ISEL-NEXT:    li 4, 4
+; ISEL-NEXT:    li 3, 5
+; ISEL-NEXT:    isel 3, 4, 3, 1
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_and_constant:
 ; NO_ISEL:       # BB#0:
-; NO_ISEL-NEXT:    lis 4, 16383
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    ori 3, 4, 65535
-; NO_ISEL-NEXT:    li 4, 23
-; NO_ISEL-NEXT:    sldi 3, 3, 2
-; NO_ISEL-NEXT:    bc 12, 1, .LBB28_2
-; NO_ISEL-NEXT:  # BB#1:
-; NO_ISEL-NEXT:    ori 3, 4, 0
-; NO_ISEL-NEXT:    b .LBB28_2
-; NO_ISEL-NEXT:  .LBB28_2:
-; NO_ISEL-NEXT:    andi. 3, 3, 5
+; NO_ISEL-NEXT:    li 4, 4
+; NO_ISEL-NEXT:    li 3, 5
+; NO_ISEL-NEXT:    bc 12, 1, .LBB28_1
+; NO_ISEL-NEXT:    blr
+; NO_ISEL-NEXT:  .LBB28_1:
+; NO_ISEL-NEXT:    addi 3, 4, 0
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = and i8 %sel, 5
@@ -710,28 +633,24 @@ define i8 @sel_constants_and_constant(i1 %cond) {
 define i8 @sel_constants_or_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_or_constant:
 ; ISEL:       # BB#0:
-; ISEL-NEXT:    lis 4, 16383
+; ISEL-NEXT:    li 4, 0
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    ori 3, 4, 65535
+; ISEL-NEXT:    oris 3, 4, 65535
 ; ISEL-NEXT:    li 4, 23
-; ISEL-NEXT:    sldi 3, 3, 2
+; ISEL-NEXT:    ori 3, 3, 65533
 ; ISEL-NEXT:    isel 3, 3, 4, 1
-; ISEL-NEXT:    ori 3, 3, 5
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_or_constant:
 ; NO_ISEL:       # BB#0:
-; NO_ISEL-NEXT:    lis 4, 16383
+; NO_ISEL-NEXT:    li 4, 0
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    ori 3, 4, 65535
+; NO_ISEL-NEXT:    oris 3, 4, 65535
 ; NO_ISEL-NEXT:    li 4, 23
-; NO_ISEL-NEXT:    sldi 3, 3, 2
-; NO_ISEL-NEXT:    bc 12, 1, .LBB29_2
+; NO_ISEL-NEXT:    ori 3, 3, 65533
+; NO_ISEL-NEXT:    bclr 12, 1, 0
 ; NO_ISEL-NEXT:  # BB#1:
 ; NO_ISEL-NEXT:    ori 3, 4, 0
-; NO_ISEL-NEXT:    b .LBB29_2
-; NO_ISEL-NEXT:  .LBB29_2:
-; NO_ISEL-NEXT:    ori 3, 3, 5
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = or i8 %sel, 5
@@ -741,28 +660,24 @@ define i8 @sel_constants_or_constant(i1 %cond) {
 define i8 @sel_constants_xor_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_xor_constant:
 ; ISEL:       # BB#0:
-; ISEL-NEXT:    lis 4, 16383
+; ISEL-NEXT:    li 4, 0
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    ori 3, 4, 65535
-; ISEL-NEXT:    li 4, 23
-; ISEL-NEXT:    sldi 3, 3, 2
+; ISEL-NEXT:    oris 3, 4, 65535
+; ISEL-NEXT:    li 4, 18
+; ISEL-NEXT:    ori 3, 3, 65529
 ; ISEL-NEXT:    isel 3, 3, 4, 1
-; ISEL-NEXT:    xori 3, 3, 5
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_xor_constant:
 ; NO_ISEL:       # BB#0:
-; NO_ISEL-NEXT:    lis 4, 16383
+; NO_ISEL-NEXT:    li 4, 0
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    ori 3, 4, 65535
-; NO_ISEL-NEXT:    li 4, 23
-; NO_ISEL-NEXT:    sldi 3, 3, 2
-; NO_ISEL-NEXT:    bc 12, 1, .LBB30_2
+; NO_ISEL-NEXT:    oris 3, 4, 65535
+; NO_ISEL-NEXT:    li 4, 18
+; NO_ISEL-NEXT:    ori 3, 3, 65529
+; NO_ISEL-NEXT:    bclr 12, 1, 0
 ; NO_ISEL-NEXT:  # BB#1:
 ; NO_ISEL-NEXT:    ori 3, 4, 0
-; NO_ISEL-NEXT:    b .LBB30_2
-; NO_ISEL-NEXT:  .LBB30_2:
-; NO_ISEL-NEXT:    xori 3, 3, 5
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = xor i8 %sel, 5
@@ -772,24 +687,29 @@ define i8 @sel_constants_xor_constant(i1 %cond) {
 define i8 @sel_constants_shl_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_shl_constant:
 ; ISEL:       # BB#0:
+; ISEL-NEXT:    lis 5, 511
+; ISEL-NEXT:    lis 4, 2047
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    li 3, 23
+; ISEL-NEXT:    ori 3, 4, 65535
+; ISEL-NEXT:    ori 12, 5, 65535
+; ISEL-NEXT:    sldi 3, 3, 5
+; ISEL-NEXT:    sldi 4, 12, 7
 ; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    slwi 3, 3, 5
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_shl_constant:
 ; NO_ISEL:       # BB#0:
+; NO_ISEL-NEXT:    lis 5, 511
+; NO_ISEL-NEXT:    lis 4, 2047
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    li 3, 23
+; NO_ISEL-NEXT:    ori 3, 4, 65535
+; NO_ISEL-NEXT:    ori 12, 5, 65535
+; NO_ISEL-NEXT:    sldi 3, 3, 5
+; NO_ISEL-NEXT:    sldi 4, 12, 7
 ; NO_ISEL-NEXT:    bc 12, 1, .LBB31_1
-; NO_ISEL-NEXT:    b .LBB31_2
+; NO_ISEL-NEXT:    blr
 ; NO_ISEL-NEXT:  .LBB31_1:
 ; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB31_2:
-; NO_ISEL-NEXT:    slwi 3, 3, 5
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = shl i8 %sel, 5
@@ -800,23 +720,20 @@ define i8 @sel_constants_lshr_constant(i1 %cond) {
 ; ISEL-LABEL: sel_constants_lshr_constant:
 ; ISEL:       # BB#0:
 ; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    li 3, 23
+; ISEL-NEXT:    li 4, 7
+; ISEL-NEXT:    li 3, 0
 ; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    rlwinm 3, 3, 27, 29, 31
 ; ISEL-NEXT:    blr
 ;
 ; NO_ISEL-LABEL: sel_constants_lshr_constant:
 ; NO_ISEL:       # BB#0:
 ; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    li 3, 23
+; NO_ISEL-NEXT:    li 4, 7
+; NO_ISEL-NEXT:    li 3, 0
 ; NO_ISEL-NEXT:    bc 12, 1, .LBB32_1
-; NO_ISEL-NEXT:    b .LBB32_2
+; NO_ISEL-NEXT:    blr
 ; NO_ISEL-NEXT:  .LBB32_1:
 ; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB32_2:
-; NO_ISEL-NEXT:    rlwinm 3, 3, 27, 29, 31
 ; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = lshr i8 %sel, 5
@@ -824,127 +741,135 @@ define i8 @sel_constants_lshr_constant(i1 %cond) {
 }
 
 define i8 @sel_constants_ashr_constant(i1 %cond) {
-; ISEL-LABEL: sel_constants_ashr_constant:
-; ISEL:       # BB#0:
-; ISEL-NEXT:    andi. 3, 3, 1
-; ISEL-NEXT:    li 4, -4
-; ISEL-NEXT:    li 3, 23
-; ISEL-NEXT:    isel 3, 4, 3, 1
-; ISEL-NEXT:    srawi 3, 3, 5
-; ISEL-NEXT:    blr
-;
-; NO_ISEL-LABEL: sel_constants_ashr_constant:
-; NO_ISEL:       # BB#0:
-; NO_ISEL-NEXT:    andi. 3, 3, 1
-; NO_ISEL-NEXT:    li 4, -4
-; NO_ISEL-NEXT:    li 3, 23
-; NO_ISEL-NEXT:    bc 12, 1, .LBB33_1
-; NO_ISEL-NEXT:    b .LBB33_2
-; NO_ISEL-NEXT:  .LBB33_1:
-; NO_ISEL-NEXT:    addi 3, 4, 0
-; NO_ISEL-NEXT:  .LBB33_2:
-; NO_ISEL-NEXT:    srawi 3, 3, 5
-; NO_ISEL-NEXT:    blr
+; ALL-LABEL: sel_constants_ashr_constant:
+; ALL:       # BB#0:
+; ALL-NEXT:    clrldi 3, 3, 63
+; ALL-NEXT:    neg 3, 3
+; ALL-NEXT:    blr
   %sel = select i1 %cond, i8 -4, i8 23
   %bo = ashr i8 %sel, 5
   ret i8 %bo
 }
 
 define double @sel_constants_fadd_constant(i1 %cond) {
-; ALL-LABEL: sel_constants_fadd_constant:
-; ALL:       # BB#0:
-; ALL-NEXT:    andi. 3, 3, 1
-; ALL-NEXT:    bc 12, 1, .LBB34_2
-; ALL-NEXT:  # BB#1:
-; ALL-NEXT:    addis 3, 2, .LCPI34_0@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI34_0@toc@l
-; ALL-NEXT:    lxsdx 0, 0, 3
-; ALL-NEXT:    b .LBB34_3
-; ALL-NEXT:  .LBB34_2:
-; ALL-NEXT:    addis 3, 2, .LCPI34_1@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI34_1@toc@l
-; ALL-NEXT:    lxsspx 0, 0, 3
-; ALL-NEXT:  .LBB34_3:
-; ALL-NEXT:    addis 3, 2, .LCPI34_2@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI34_2@toc@l
-; ALL-NEXT:    lxsdx 1, 0, 3
-; ALL-NEXT:    xsadddp 1, 0, 1
-; ALL-NEXT:    blr
+; ISEL-LABEL: sel_constants_fadd_constant:
+; ISEL:       # BB#0:
+; ISEL-NEXT:    andi. 3, 3, 1
+; ISEL-NEXT:    addis 4, 2, .LCPI34_0@toc@ha
+; ISEL-NEXT:    addis 3, 2, .LCPI34_1@toc@ha
+; ISEL-NEXT:    addi 4, 4, .LCPI34_0@toc@l
+; ISEL-NEXT:    addi 3, 3, .LCPI34_1@toc@l
+; ISEL-NEXT:    isel 3, 3, 4, 1
+; ISEL-NEXT:    lxsdx 1, 0, 3
+; ISEL-NEXT:    blr
+;
+; NO_ISEL-LABEL: sel_constants_fadd_constant:
+; NO_ISEL:       # BB#0:
+; NO_ISEL-NEXT:    andi. 3, 3, 1
+; NO_ISEL-NEXT:    addis 4, 2, .LCPI34_0@toc@ha
+; NO_ISEL-NEXT:    addis 3, 2, .LCPI34_1@toc@ha
+; NO_ISEL-NEXT:    addi 4, 4, .LCPI34_0@toc@l
+; NO_ISEL-NEXT:    addi 3, 3, .LCPI34_1@toc@l
+; NO_ISEL-NEXT:    bc 12, 1, .LBB34_2
+; NO_ISEL-NEXT:  # BB#1:
+; NO_ISEL-NEXT:    ori 3, 4, 0
+; NO_ISEL-NEXT:    b .LBB34_2
+; NO_ISEL-NEXT:  .LBB34_2:
+; NO_ISEL-NEXT:    lxsdx 1, 0, 3
+; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, double -4.0, double 23.3
   %bo = fadd double %sel, 5.1
   ret double %bo
 }
 
 define double @sel_constants_fsub_constant(i1 %cond) {
-; ALL-LABEL: sel_constants_fsub_constant:
-; ALL:       # BB#0:
-; ALL-NEXT:    andi. 3, 3, 1
-; ALL-NEXT:    bc 12, 1, .LBB35_2
-; ALL-NEXT:  # BB#1:
-; ALL-NEXT:    addis 3, 2, .LCPI35_0@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI35_0@toc@l
-; ALL-NEXT:    lxsdx 0, 0, 3
-; ALL-NEXT:    b .LBB35_3
-; ALL-NEXT:  .LBB35_2:
-; ALL-NEXT:    addis 3, 2, .LCPI35_1@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI35_1@toc@l
-; ALL-NEXT:    lxsspx 0, 0, 3
-; ALL-NEXT:  .LBB35_3:
-; ALL-NEXT:    addis 3, 2, .LCPI35_2@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI35_2@toc@l
-; ALL-NEXT:    lxsdx 1, 0, 3
-; ALL-NEXT:    xsadddp 1, 0, 1
-; ALL-NEXT:    blr
+; ISEL-LABEL: sel_constants_fsub_constant:
+; ISEL:       # BB#0:
+; ISEL-NEXT:    andi. 3, 3, 1
+; ISEL-NEXT:    addis 4, 2, .LCPI35_0@toc@ha
+; ISEL-NEXT:    addis 3, 2, .LCPI35_1@toc@ha
+; ISEL-NEXT:    addi 4, 4, .LCPI35_0@toc@l
+; ISEL-NEXT:    addi 3, 3, .LCPI35_1@toc@l
+; ISEL-NEXT:    isel 3, 3, 4, 1
+; ISEL-NEXT:    lxsdx 1, 0, 3
+; ISEL-NEXT:    blr
+;
+; NO_ISEL-LABEL: sel_constants_fsub_constant:
+; NO_ISEL:       # BB#0:
+; NO_ISEL-NEXT:    andi. 3, 3, 1
+; NO_ISEL-NEXT:    addis 4, 2, .LCPI35_0@toc@ha
+; NO_ISEL-NEXT:    addis 3, 2, .LCPI35_1@toc@ha
+; NO_ISEL-NEXT:    addi 4, 4, .LCPI35_0@toc@l
+; NO_ISEL-NEXT:    addi 3, 3, .LCPI35_1@toc@l
+; NO_ISEL-NEXT:    bc 12, 1, .LBB35_2
+; NO_ISEL-NEXT:  # BB#1:
+; NO_ISEL-NEXT:    ori 3, 4, 0
+; NO_ISEL-NEXT:    b .LBB35_2
+; NO_ISEL-NEXT:  .LBB35_2:
+; NO_ISEL-NEXT:    lxsdx 1, 0, 3
+; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, double -4.0, double 23.3
   %bo = fsub double %sel, 5.1
   ret double %bo
 }
 
 define double @sel_constants_fmul_constant(i1 %cond) {
-; ALL-LABEL: sel_constants_fmul_constant:
-; ALL:       # BB#0:
-; ALL-NEXT:    andi. 3, 3, 1
-; ALL-NEXT:    bc 12, 1, .LBB36_2
-; ALL-NEXT:  # BB#1:
-; ALL-NEXT:    addis 3, 2, .LCPI36_0@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI36_0@toc@l
-; ALL-NEXT:    lxsdx 0, 0, 3
-; ALL-NEXT:    b .LBB36_3
-; ALL-NEXT:  .LBB36_2:
-; ALL-NEXT:    addis 3, 2, .LCPI36_1@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI36_1@toc@l
-; ALL-NEXT:    lxsspx 0, 0, 3
-; ALL-NEXT:  .LBB36_3:
-; ALL-NEXT:    addis 3, 2, .LCPI36_2@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI36_2@toc@l
-; ALL-NEXT:    lxsdx 1, 0, 3
-; ALL-NEXT:    xsmuldp 1, 0, 1
-; ALL-NEXT:    blr
+; ISEL-LABEL: sel_constants_fmul_constant:
+; ISEL:       # BB#0:
+; ISEL-NEXT:    andi. 3, 3, 1
+; ISEL-NEXT:    addis 4, 2, .LCPI36_0@toc@ha
+; ISEL-NEXT:    addis 3, 2, .LCPI36_1@toc@ha
+; ISEL-NEXT:    addi 4, 4, .LCPI36_0@toc@l
+; ISEL-NEXT:    addi 3, 3, .LCPI36_1@toc@l
+; ISEL-NEXT:    isel 3, 3, 4, 1
+; ISEL-NEXT:    lxsdx 1, 0, 3
+; ISEL-NEXT:    blr
+;
+; NO_ISEL-LABEL: sel_constants_fmul_constant:
+; NO_ISEL:       # BB#0:
+; NO_ISEL-NEXT:    andi. 3, 3, 1
+; NO_ISEL-NEXT:    addis 4, 2, .LCPI36_0@toc@ha
+; NO_ISEL-NEXT:    addis 3, 2, .LCPI36_1@toc@ha
+; NO_ISEL-NEXT:    addi 4, 4, .LCPI36_0@toc@l
+; NO_ISEL-NEXT:    addi 3, 3, .LCPI36_1@toc@l
+; NO_ISEL-NEXT:    bc 12, 1, .LBB36_2
+; NO_ISEL-NEXT:  # BB#1:
+; NO_ISEL-NEXT:    ori 3, 4, 0
+; NO_ISEL-NEXT:    b .LBB36_2
+; NO_ISEL-NEXT:  .LBB36_2:
+; NO_ISEL-NEXT:    lxsdx 1, 0, 3
+; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, double -4.0, double 23.3
   %bo = fmul double %sel, 5.1
   ret double %bo
 }
 
 define double @sel_constants_fdiv_constant(i1 %cond) {
-; ALL-LABEL: sel_constants_fdiv_constant:
-; ALL:       # BB#0:
-; ALL-NEXT:    andi. 3, 3, 1
-; ALL-NEXT:    bc 12, 1, .LBB37_2
-; ALL-NEXT:  # BB#1:
-; ALL-NEXT:    addis 3, 2, .LCPI37_0@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI37_0@toc@l
-; ALL-NEXT:    lxsdx 0, 0, 3
-; ALL-NEXT:    b .LBB37_3
-; ALL-NEXT:  .LBB37_2:
-; ALL-NEXT:    addis 3, 2, .LCPI37_1@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI37_1@toc@l
-; ALL-NEXT:    lxsspx 0, 0, 3
-; ALL-NEXT:  .LBB37_3:
-; ALL-NEXT:    addis 3, 2, .LCPI37_2@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI37_2@toc@l
-; ALL-NEXT:    lxsdx 1, 0, 3
-; ALL-NEXT:    xsdivdp 1, 0, 1
-; ALL-NEXT:    blr
+; ISEL-LABEL: sel_constants_fdiv_constant:
+; ISEL:       # BB#0:
+; ISEL-NEXT:    andi. 3, 3, 1
+; ISEL-NEXT:    addis 4, 2, .LCPI37_0@toc@ha
+; ISEL-NEXT:    addis 3, 2, .LCPI37_1@toc@ha
+; ISEL-NEXT:    addi 4, 4, .LCPI37_0@toc@l
+; ISEL-NEXT:    addi 3, 3, .LCPI37_1@toc@l
+; ISEL-NEXT:    isel 3, 3, 4, 1
+; ISEL-NEXT:    lxsdx 1, 0, 3
+; ISEL-NEXT:    blr
+;
+; NO_ISEL-LABEL: sel_constants_fdiv_constant:
+; NO_ISEL:       # BB#0:
+; NO_ISEL-NEXT:    andi. 3, 3, 1
+; NO_ISEL-NEXT:    addis 4, 2, .LCPI37_0@toc@ha
+; NO_ISEL-NEXT:    addis 3, 2, .LCPI37_1@toc@ha
+; NO_ISEL-NEXT:    addi 4, 4, .LCPI37_0@toc@l
+; NO_ISEL-NEXT:    addi 3, 3, .LCPI37_1@toc@l
+; NO_ISEL-NEXT:    bc 12, 1, .LBB37_2
+; NO_ISEL-NEXT:  # BB#1:
+; NO_ISEL-NEXT:    ori 3, 4, 0
+; NO_ISEL-NEXT:    b .LBB37_2
+; NO_ISEL-NEXT:  .LBB37_2:
+; NO_ISEL-NEXT:    lxsdx 1, 0, 3
+; NO_ISEL-NEXT:    blr
   %sel = select i1 %cond, double -4.0, double 23.3
   %bo = fdiv double %sel, 5.1
   ret double %bo
@@ -959,27 +884,11 @@ define double @sel_constants_frem_constant(i1 %cond) {
 ; ALL-NEXT:    addis 3, 2, .LCPI38_0@toc@ha
 ; ALL-NEXT:    addi 3, 3, .LCPI38_0@toc@l
 ; ALL-NEXT:    lxsdx 1, 0, 3
-; ALL-NEXT:    b .LBB38_3
+; ALL-NEXT:    blr
 ; ALL-NEXT:  .LBB38_2:
 ; ALL-NEXT:    addis 3, 2, .LCPI38_1@toc@ha
 ; ALL-NEXT:    addi 3, 3, .LCPI38_1@toc@l
 ; ALL-NEXT:    lxsspx 1, 0, 3
-; ALL-NEXT:  .LBB38_3:
-; ALL-NEXT:    mflr 0
-; ALL-NEXT:    std 0, 16(1)
-; ALL-NEXT:    stdu 1, -96(1)
-; ALL-NEXT:  .Lcfi0:
-; ALL-NEXT:    .cfi_def_cfa_offset 96
-; ALL-NEXT:  .Lcfi1:
-; ALL-NEXT:    .cfi_offset lr, 16
-; ALL-NEXT:    addis 3, 2, .LCPI38_2@toc@ha
-; ALL-NEXT:    addi 3, 3, .LCPI38_2@toc@l
-; ALL-NEXT:    lxsdx 2, 0, 3
-; ALL-NEXT:    bl fmod
-; ALL-NEXT:    nop
-; ALL-NEXT:    addi 1, 1, 96
-; ALL-NEXT:    ld 0, 16(1)
-; ALL-NEXT:    mtlr 0
 ; ALL-NEXT:    blr
   %sel = select i1 %cond, double -4.0, double 23.3
   %bo = frem double %sel, 5.1
diff --git a/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll b/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
index cffefc2bee6..66d3f3108ec 100644
--- a/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
+++ b/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
@@ -9,19 +9,21 @@
 define i32 @main() nounwind {
 ; CHECK-LABEL: main:
 ; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    cmpq $0, {{.*}}(%rip)
+; CHECK-NEXT:    movb $-106, %al
+; CHECK-NEXT:    jne .LBB0_2
+; CHECK-NEXT:  # BB#1: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpq {{.*}}(%rip), %rax
-; CHECK-NEXT:    sbbl %eax, %eax
-; CHECK-NEXT:    andl $150, %eax
+; CHECK-NEXT:  .LBB0_2: # %entry
 ; CHECK-NEXT:    testb %al, %al
-; CHECK-NEXT:    jle .LBB0_1
-; CHECK-NEXT:  # BB#2: # %if.then
+; CHECK-NEXT:    jle .LBB0_3
+; CHECK-NEXT:  # BB#4: # %if.then
 ; CHECK-NEXT:    movl $1, {{.*}}(%rip)
 ; CHECK-NEXT:    movl $1, %esi
-; CHECK-NEXT:    jmp .LBB0_3
-; CHECK-NEXT:  .LBB0_1: # %entry.if.end_crit_edge
+; CHECK-NEXT:    jmp .LBB0_5
+; CHECK-NEXT:  .LBB0_3: # %entry.if.end_crit_edge
 ; CHECK-NEXT:    movl {{.*}}(%rip), %esi
-; CHECK-NEXT:  .LBB0_3: # %if.end
+; CHECK-NEXT:  .LBB0_5: # %if.end
 ; CHECK-NEXT:    pushq %rax
 ; CHECK-NEXT:    movl $.L.str, %edi
 ; CHECK-NEXT:    xorl %eax, %eax
diff --git a/test/CodeGen/X86/avx512-insert-extract.ll b/test/CodeGen/X86/avx512-insert-extract.ll
index 9a5ce66ec48..1ad0de66fca 100644
--- a/test/CodeGen/X86/avx512-insert-extract.ll
+++ b/test/CodeGen/X86/avx512-insert-extract.ll
@@ -1439,11 +1439,8 @@ define zeroext i8 @extractelement_v2i1_alt(<2 x i64> %a, <2 x i64> %b) {
 ; SKX-NEXT:    kmovw %k0, %eax
 ; SKX-NEXT:    andl $1, %eax
 ; SKX-NEXT:    testb %al, %al
-; SKX-NEXT:    je LBB51_2
-; SKX-NEXT:  ## BB#1:
-; SKX-NEXT:    movb $-1, %al
-; SKX-NEXT:  LBB51_2:
-; SKX-NEXT:    addb $4, %al
+; SKX-NEXT:    sete %al
+; SKX-NEXT:    addb $3, %al
 ; SKX-NEXT:    movzbl %al, %eax
 ; SKX-NEXT:    retq
   %t1 = icmp ugt <2 x i64> %a, %b
@@ -1555,11 +1552,8 @@ define zeroext i8 @extractelement_v64i1_alt(<64 x i8> %a, <64 x i8> %b) {
 ; SKX-NEXT:    kmovw %k0, %eax
 ; SKX-NEXT:    andl $1, %eax
 ; SKX-NEXT:    testb %al, %al
-; SKX-NEXT:    je LBB55_2
-; SKX-NEXT:  ## BB#1:
-; SKX-NEXT:    movb $-1, %al
-; SKX-NEXT:  LBB55_2:
-; SKX-NEXT:    addb $4, %al
+; SKX-NEXT:    sete %al
+; SKX-NEXT:    addb $3, %al
 ; SKX-NEXT:    movzbl %al, %eax
 ; SKX-NEXT:    retq
   %t1 = icmp ugt <64 x i8> %a, %b
diff --git a/test/CodeGen/X86/select_const.ll b/test/CodeGen/X86/select_const.ll
index 46323b66218..c19060e6bcf 100644
--- a/test/CodeGen/X86/select_const.ll
+++ b/test/CodeGen/X86/select_const.ll
@@ -266,12 +266,10 @@ define <4 x i32> @sel_constants_add_constant_vec(i1 %cond) {
 ; CHECK-NEXT:    testb $1, %dil
 ; CHECK-NEXT:    jne .LBB22_1
 ; CHECK-NEXT:  # BB#2:
-; CHECK-NEXT:    movdqa {{.*#+}} xmm0 = [11,11,11,11]
-; CHECK-NEXT:    paddd {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [12,13,14,15]
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .LBB22_1:
-; CHECK-NEXT:    movdqa {{.*#+}} xmm0 = [4294967292,12,1,0]
-; CHECK-NEXT:    paddd {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [4294967293,14,4,4]
 ; CHECK-NEXT:    retq
   %sel = select i1 %cond, <4 x i32> <i32 -4, i32 12, i32 1, i32 0>, <4 x i32> <i32 11, i32 11, i32 11, i32 11>
   %bo = add <4 x i32> %sel, <i32 1, i32 2, i32 3, i32 4>
@@ -284,12 +282,10 @@ define <2 x double> @sel_constants_fmul_constant_vec(i1 %cond) {
 ; CHECK-NEXT:    testb $1, %dil
 ; CHECK-NEXT:    jne .LBB23_1
 ; CHECK-NEXT:  # BB#2:
-; CHECK-NEXT:    movapd {{.*#+}} xmm0 = [2.330000e+01,1.100000e+01]
-; CHECK-NEXT:    mulpd {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [1.188300e+02,3.454000e+01]
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .LBB23_1:
-; CHECK-NEXT:    movapd {{.*#+}} xmm0 = [-4.000000e+00,1.200000e+01]
-; CHECK-NEXT:    mulpd {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    movaps {{.*#+}} xmm0 = [-2.040000e+01,3.768000e+01]
 ; CHECK-NEXT:    retq
   %sel = select i1 %cond, <2 x double> <double -4.0, double 12.0>, <2 x double> <double 23.3, double 11.0>
   %bo = fmul <2 x double> %sel, <double 5.1, double 3.14>
diff --git a/test/CodeGen/X86/setcc.ll b/test/CodeGen/X86/setcc.ll
index 8fe4116d5ce..1b8f1ce4c9e 100644
--- a/test/CodeGen/X86/setcc.ll
+++ b/test/CodeGen/X86/setcc.ll
@@ -49,9 +49,9 @@ define i32 @t4(i32 %a) {
 ; CHECK:       ## BB#0:
 ; CHECK-NEXT:    movq _v4@{{.*}}(%rip), %rax
 ; CHECK-NEXT:    cmpl $1, (%rax)
-; CHECK-NEXT:    sbbl %eax, %eax
-; CHECK-NEXT:    andl $32768, %eax ## imm = 0x8000
-; CHECK-NEXT:    leal 65536(%rax,%rax), %eax
+; CHECK-NEXT:    movw $1, %ax
+; CHECK-NEXT:    adcw $0, %ax
+; CHECK-NEXT:    shll $16, %eax
 ; CHECK-NEXT:    retq
   %t0 = load i32, i32* @v4, align 4
   %not.tobool = icmp eq i32 %t0, 0