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Teach DAGISelEmitter about zero_reg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37900 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -622,7 +622,8 @@ static std::vector<unsigned char> getImplicitType(Record *R, bool NotRegisters,
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} else if (R->getName() == "ptr_rc") {
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} else if (R->getName() == "ptr_rc") {
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Other[0] = MVT::iPTR;
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Other[0] = MVT::iPTR;
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return Other;
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return Other;
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} else if (R->getName() == "node" || R->getName() == "srcvalue") {
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} else if (R->getName() == "node" || R->getName() == "srcvalue" ||
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R->getName() == "zero_reg") {
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// Placeholder.
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// Placeholder.
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return Unknown;
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return Unknown;
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}
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}
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@ -2711,6 +2712,12 @@ public:
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getEnumName(N->getTypeNum(0)) + ");");
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getEnumName(N->getTypeNum(0)) + ");");
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NodeOps.push_back("Tmp" + utostr(ResNo));
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NodeOps.push_back("Tmp" + utostr(ResNo));
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return NodeOps;
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return NodeOps;
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} else if (DI->getDef()->getName() == "zero_reg") {
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emitCode("SDOperand Tmp" + utostr(ResNo) +
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" = CurDAG->getRegister(0, " +
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getEnumName(N->getTypeNum(0)) + ");");
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NodeOps.push_back("Tmp" + utostr(ResNo));
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return NodeOps;
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}
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}
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} else if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
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} else if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
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unsigned ResNo = TmpNo++;
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unsigned ResNo = TmpNo++;
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