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[AVX512] Add X86::VR512RegClassID to X86RegisterInfo::getLargestLegalSuperClass.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277301 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2016-07-31 20:19:50 +00:00
parent bc139df3fe
commit 7882ecba2d
2 changed files with 12 additions and 11 deletions
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1
lib/Target/X86/X86RegisterInfo.cpp
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@ -143,6 +143,7 @@ X86RegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC,
case X86::RFP80RegClassID:
case X86::VR128RegClassID:
case X86::VR256RegClassID:
case X86::VR512RegClassID:
// Don't return a super-class that would shrink the spill size.
// That can happen with the vector and float classes.
if (Super->getSize() == RC->getSize())

22
test/CodeGen/X86/vector-compare-results.ll
View File

@ -7008,20 +7008,20 @@ define <32 x i1> @test_cmp_v32f64(<32 x double> %a0, <32 x double> %a1) nounwind
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm4[0],xmm2[0]
; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm1
; AVX512-NEXT: vextractf32x4 $3, %zmm7, %xmm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
; AVX512-NEXT: vextractf32x4 $3, %zmm7, %xmm1
; AVX512-NEXT: vextractf32x4 $3, %zmm3, %xmm2
; AVX512-NEXT: vucomisd %xmm0, %xmm2
; AVX512-NEXT: vucomisd %xmm1, %xmm2
; AVX512-NEXT: movl $0, %edx
; AVX512-NEXT: cmovaq %rcx, %rdx
; AVX512-NEXT: vmovq %rdx, %xmm4
; AVX512-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX512-NEXT: vpermilpd {{.*#+}} xmm1 = xmm1[1,0]
; AVX512-NEXT: vpermilpd {{.*#+}} xmm2 = xmm2[1,0]
; AVX512-NEXT: vucomisd %xmm0, %xmm2
; AVX512-NEXT: vucomisd %xmm1, %xmm2
; AVX512-NEXT: movl $0, %edx
; AVX512-NEXT: cmovaq %rcx, %rdx
; AVX512-NEXT: vmovq %rdx, %xmm0
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm4[0],xmm0[0]
; AVX512-NEXT: vmovq %rdx, %xmm1
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm4[0],xmm1[0]
; AVX512-NEXT: vextractf32x4 $2, %zmm7, %xmm2
; AVX512-NEXT: vextractf32x4 $2, %zmm3, %xmm4
; AVX512-NEXT: vucomisd %xmm2, %xmm4
@ -7035,7 +7035,7 @@ define <32 x i1> @test_cmp_v32f64(<32 x double> %a0, <32 x double> %a1) nounwind
; AVX512-NEXT: cmovaq %rcx, %rdx
; AVX512-NEXT: vmovq %rdx, %xmm2
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm5[0],xmm2[0]
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm2, %ymm0
; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
; AVX512-NEXT: vextractf32x4 $1, %zmm7, %xmm2
; AVX512-NEXT: vextractf32x4 $1, %zmm3, %xmm4
; AVX512-NEXT: vucomisd %xmm2, %xmm4
@ -7060,9 +7060,9 @@ define <32 x i1> @test_cmp_v32f64(<32 x double> %a0, <32 x double> %a1) nounwind
; AVX512-NEXT: vmovq %rax, %xmm3
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2
; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0
; AVX512-NEXT: vpmovqd %zmm0, %ymm0
; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1
; AVX512-NEXT: vpmovqd %zmm1, %ymm1
; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512-NEXT: vpmovdb %zmm0, %xmm0
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm8, %ymm0
; AVX512-NEXT: retq