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Since ARM's prefetch implementation predicted the presence of a instruction

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cache prefetch and now that the info from "prefetch" to "ARMPreload" is present,
only add a testcase for PLI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132978 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2011-06-14 05:11:46 +00:00
parent 9a767330f5
commit 79abd1c27c
1 changed files with 11 additions and 0 deletions
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11
test/CodeGen/ARM/prefetch.ll
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@ -64,3 +64,14 @@ entry:
} }
declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind
define void @t5(i8* %ptr) nounwind {
entry:
; ARM: t5:
; ARM: pli [r0]
; THUMB2: t5:
; THUMB2: pli [r0]
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 0 )
ret void
}