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Defer computation of SuperRegs.
Don't compute the SuperRegs list until the sub-register graph is completely finished. This guarantees that the list of super-registers is properly topologically ordered, and has no duplicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156629 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -83,7 +83,8 @@ CodeGenRegister::CodeGenRegister(Record *R, unsigned Enum)
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EnumValue(Enum),
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CostPerUse(R->getValueAsInt("CostPerUse")),
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CoveredBySubRegs(R->getValueAsBit("CoveredBySubRegs")),
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SubRegsComplete(false)
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SubRegsComplete(false),
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SuperRegsComplete(false)
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{}
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void CodeGenRegister::buildObjectGraph(CodeGenRegBank &RegBank) {
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@ -219,19 +220,10 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
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CodeGenRegister *SR = ExplicitSubRegs[i];
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const SubRegMap &Map = SR->computeSubRegs(RegBank);
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// Add this as a super-register of SR now all sub-registers are in the list.
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// This creates a topological ordering, the exact order depends on the
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// order computeSubRegs is called on all registers.
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SR->SuperRegs.push_back(this);
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for (SubRegMap::const_iterator SI = Map.begin(), SE = Map.end(); SI != SE;
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++SI) {
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if (!SubRegs.insert(*SI).second)
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Orphans.insert(SI->second);
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// Noop sub-register indexes are possible, so avoid duplicates.
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if (SI->second != SR)
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SI->second->SuperRegs.push_back(this);
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}
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}
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@ -439,7 +431,6 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
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CodeGenSubRegIndex *NewIdx = NewSubRegs[i].first;
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CodeGenRegister *NewSubReg = NewSubRegs[i].second;
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SubReg2Idx.insert(std::make_pair(NewSubReg, NewIdx));
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NewSubReg->SuperRegs.push_back(this);
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}
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// Create sub-register index composition maps for the synthesized indices.
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@ -457,6 +448,30 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
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}
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}
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void CodeGenRegister::computeSuperRegs() {
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// Only visit each register once.
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if (SuperRegsComplete)
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return;
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SuperRegsComplete = true;
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// Make sure all sub-registers have been visited first, so the super-reg
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// lists will be topologically ordered.
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for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
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I != E; ++I)
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I->second->computeSuperRegs();
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// Now add this as a super-register on all sub-registers.
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for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
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I != E; ++I) {
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if (I->second == this)
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continue;
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// Don't add duplicate entries.
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if (!I->second->SuperRegs.empty() && I->second->SuperRegs.back() == this)
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continue;
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I->second->SuperRegs.push_back(this);
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}
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}
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void
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CodeGenRegister::addSubRegsPreOrder(SetVector<const CodeGenRegister*> &OSet,
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CodeGenRegBank &RegBank) const {
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@ -900,6 +915,11 @@ CodeGenRegBank::CodeGenRegBank(RecordKeeper &Records) : Records(Records) {
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if (Registers[i]->CoveredBySubRegs)
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Registers[i]->computeSecondarySubRegs(*this);
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// After the sub-register graph is complete, compute the topologically
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// ordered SuperRegs list.
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for (unsigned i = 0, e = Registers.size(); i != e; ++i)
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Registers[i]->computeSuperRegs();
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// Native register units are associated with a leaf register. They've all been
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// discovered now.
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NumNativeRegUnits = NumRegUnits;
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@ -112,6 +112,10 @@ namespace llvm {
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// Compute extra sub-registers by combining the existing sub-registers.
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void computeSecondarySubRegs(CodeGenRegBank&);
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// Add this as a super-register to all sub-registers after the sub-register
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// graph has been built.
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void computeSuperRegs();
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const SubRegMap &getSubRegs() const {
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assert(SubRegsComplete && "Must precompute sub-registers");
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return SubRegs;
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@ -169,6 +173,7 @@ namespace llvm {
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private:
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bool SubRegsComplete;
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bool SuperRegsComplete;
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// The sub-registers explicit in the .td file form a tree.
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SmallVector<CodeGenSubRegIndex*, 8> ExplicitSubRegIndices;
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