RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-11-30 23:20:54 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[AVX-512] Add tests demonstrating failure to generated masked instructions for VSHUFF32x4 and VSHUFI32x4 due to shuffle lowering widening elements.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287897 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2016-11-24 18:24:46 +00:00
parent c3bdfe57eb
commit 7a525e09ac
1 changed files with 44 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
test/CodeGen/X86/vector-shuffle-512-v16.ll
View File

@ -424,3 +424,47 @@ define <16 x i32> @test_vshufi32x4_512(<16 x i32> %x, <16 x i32> %x1) nounwind {
%res = shufflevector <16 x i32> %x, <16 x i32> %x1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>
ret <16 x i32> %res
}
define <16 x float> @test_vshuff32x4_512_mask(<16 x float> %x, <16 x float> %x1, <16 x float> %y, <16 x i1> %mask) nounwind {
; AVX512F-LABEL: test_vshuff32x4_512_mask:
; AVX512F: # BB#0:
; AVX512F-NEXT: vpmovsxbd %xmm3, %zmm3
; AVX512F-NEXT: vpslld $31, %zmm3, %zmm3
; AVX512F-NEXT: vptestmd %zmm3, %zmm3, %k1
; AVX512F-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm1[2,3,0,1]
; AVX512F-NEXT: vblendmps %zmm0, %zmm2, %zmm0 {%k1}
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: test_vshuff32x4_512_mask:
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpsllw $7, %xmm3, %xmm3
; AVX512BW-NEXT: vpmovb2m %zmm3, %k1
; AVX512BW-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm1[2,3,0,1]
; AVX512BW-NEXT: vblendmps %zmm0, %zmm2, %zmm0 {%k1}
; AVX512BW-NEXT: retq
%x2 = shufflevector <16 x float> %x, <16 x float> %x1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>
%res = select <16 x i1> %mask, <16 x float> %x2, <16 x float> %y
ret <16 x float> %res
}
define <16 x i32> @test_vshufi32x4_512_mask(<16 x i32> %x, <16 x i32> %x1, <16 x i32> %y, <16 x i1> %mask) nounwind {
; AVX512F-LABEL: test_vshufi32x4_512_mask:
; AVX512F: # BB#0:
; AVX512F-NEXT: vpmovsxbd %xmm3, %zmm3
; AVX512F-NEXT: vpslld $31, %zmm3, %zmm3
; AVX512F-NEXT: vptestmd %zmm3, %zmm3, %k1
; AVX512F-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm1[2,3,0,1]
; AVX512F-NEXT: vpblendmd %zmm0, %zmm2, %zmm0 {%k1}
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: test_vshufi32x4_512_mask:
; AVX512BW: # BB#0:
; AVX512BW-NEXT: vpsllw $7, %xmm3, %xmm3
; AVX512BW-NEXT: vpmovb2m %zmm3, %k1
; AVX512BW-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3],zmm1[2,3,0,1]
; AVX512BW-NEXT: vpblendmd %zmm0, %zmm2, %zmm0 {%k1}
; AVX512BW-NEXT: retq
%x2 = shufflevector <16 x i32> %x, <16 x i32> %x1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19>
%res = select <16 x i1> %mask, <16 x i32> %x2, <16 x i32> %y
ret <16 x i32> %res
}