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[mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.

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Summary: Partially fixes PR27458

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D20330

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270037 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2016-05-19 10:42:14 +00:00
parent 7e9b79653d
commit 7b27dc2e11
2 changed files with 3 additions and 2 deletions
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2
lib/Target/Mips/Mips16InstrInfo.td
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@ -1551,7 +1551,7 @@ def: UncondBranch16_pat<br, Bimm16>;
// Small immediates
def: Mips16Pat<(i32 immSExt16:$in),
(AddiuRxRxImmX16 (Move32R16 ZERO), immSExt16:$in)>;
(AddiuRxRxImmX16 (MoveR3216 ZERO), immSExt16:$in)>;
def: Mips16Pat<(i32 immZExt16:$in), (LiRxImmX16 immZExt16:$in)>;

3
test/CodeGen/Mips/mips16fpe.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16hf
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=16hf
@x = global float 5.000000e+00, align 4
@y = global float 1.500000e+01, align 4