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Make this test even more OS and register allocation neutral.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230404 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2015-02-25 00:12:11 +00:00
parent a230eee39a
commit 7c5314a076
1 changed files with 16 additions and 16 deletions
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32
test/CodeGen/X86/mmx-fold-load.ll
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@ -3,8 +3,8 @@
define i64 @t0(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t0:
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psllq (%rsi), %mm0
; CHECK: movq (%[[REG1:[a-z]+]]), %mm0
; CHECK-NEXT: psllq (%[[REG2:[a-z]+]]), %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
entry:
@ -20,8 +20,8 @@ declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
define i64 @t1(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t1:
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrlq (%rsi), %mm0
; CHECK: movq (%[[REG1]]), %mm0
; CHECK-NEXT: psrlq (%[[REG2]]), %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
entry:
@ -37,8 +37,8 @@ declare x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx, i32)
define i64 @t2(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t2:
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psllw (%rsi), %mm0
; CHECK: movq (%[[REG1]]), %mm0
; CHECK-NEXT: psllw (%[[REG2]]), %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
entry:
@ -54,8 +54,8 @@ declare x86_mmx @llvm.x86.mmx.pslli.w(x86_mmx, i32)
define i64 @t3(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t3:
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrlw (%rsi), %mm0
; CHECK: movq (%[[REG1]]), %mm0
; CHECK-NEXT: psrlw (%[[REG2]]), %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
entry:
@ -71,8 +71,8 @@ declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32)
define i64 @t4(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t4:
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: pslld (%rsi), %mm0
; CHECK: movq (%[[REG1]]), %mm0
; CHECK-NEXT: pslld (%[[REG2]]), %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
entry:
@ -88,8 +88,8 @@ declare x86_mmx @llvm.x86.mmx.pslli.d(x86_mmx, i32)
define i64 @t5(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t5:
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrld (%rsi), %mm0
; CHECK: movq (%[[REG1]]), %mm0
; CHECK-NEXT: psrld (%[[REG2]]), %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
entry:
@ -105,8 +105,8 @@ declare x86_mmx @llvm.x86.mmx.psrli.d(x86_mmx, i32)
define i64 @t6(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t6:
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psraw (%rsi), %mm0
; CHECK: movq (%[[REG1]]), %mm0
; CHECK-NEXT: psraw (%[[REG2]]), %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
entry:
@ -122,8 +122,8 @@ declare x86_mmx @llvm.x86.mmx.psrai.w(x86_mmx, i32)
define i64 @t7(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t7:
; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrad (%rsi), %mm0
; CHECK: movq (%[[REG1]]), %mm0
; CHECK-NEXT: psrad (%[[REG2]]), %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
entry: