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Teach InstCombine to work with smaller legal types in icmp (shl %v, C1), C2
It enables to work with a smaller constant, which is target friendly for those which can compare to immediates. It also avoids inserting a shift in favor of a trunc, which can be free on some targets. This used to work until LLVM-3.1, but regressed with the 3.2 release. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175270 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1331,6 +1331,25 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
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return new ICmpInst(TrueIfSigned ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ,
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And, Constant::getNullValue(And->getType()));
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}
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// Transform (icmp pred iM (shl iM %v, N), CI)
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// -> (icmp pred i(M-N) (trunc %v iM to i(N-N)), (trunc (CI>>N))
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// Transform the shl to a trunc if (trunc (CI>>N)) has no loss.
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// This enables to get rid of the shift in favor of a trunc which can be
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// free on the target. It has the additional benefit of comparing to a
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// smaller constant, which will be target friendly.
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unsigned Amt = ShAmt->getLimitedValue(TypeBits-1);
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if (Amt != 0 && RHSV.countTrailingZeros() >= Amt) {
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Type *NTy = IntegerType::get(ICI.getContext(), TypeBits - Amt);
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Constant *NCI = ConstantExpr::getTrunc(
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ConstantExpr::getAShr(RHS,
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ConstantInt::get(RHS->getType(), Amt)),
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NTy);
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return new ICmpInst(ICI.getPredicate(),
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Builder->CreateTrunc(LHSI->getOperand(0), NTy),
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ConstantExpr::getTrunc(NCI, NTy));
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}
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break;
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}
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@ -99,9 +99,9 @@ define i1 @ashr_icmp2(i64 %X) nounwind {
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; PR9998
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; Make sure we don't transform the ashr here into an sdiv
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; CHECK: @pr9998
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; CHECK: = and i32 %V, 1
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; CHECK: %Z = icmp ne
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; CHECK: ret i1 %Z
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; CHECK: [[BIT:%[A-Za-z0-9.]+]] = and i32 %V, 1
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; CHECK-NEXT: [[CMP:%[A-Za-z0-9.]+]] = icmp ne i32 [[BIT]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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define i1 @pr9998(i32 %V) nounwind {
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entry:
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%W = shl i32 %V, 31
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@ -112,6 +112,7 @@ entry:
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}
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; CHECK: @udiv_icmp1
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; CHECK: icmp ne i64 %X, 0
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define i1 @udiv_icmp1(i64 %X) nounwind {
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@ -706,3 +706,41 @@ define i1 @test69(i32 %c) nounwind uwtable {
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%3 = or i1 %1, %2
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ret i1 %3
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}
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; CHECK: @icmp_sext16trunc
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; CHECK-NEXT: %1 = trunc i32 %x to i16
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; CHECK-NEXT: %cmp = icmp slt i16 %1, 36
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define i1 @icmp_sext16trunc(i32 %x) {
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%trunc = trunc i32 %x to i16
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%sext = sext i16 %trunc to i32
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%cmp = icmp slt i32 %sext, 36
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ret i1 %cmp
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}
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; CHECK: @icmp_sext8trunc
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; CHECK-NEXT: %1 = trunc i32 %x to i8
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; CHECK-NEXT: %cmp = icmp slt i8 %1, 36
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define i1 @icmp_sext8trunc(i32 %x) {
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%trunc = trunc i32 %x to i8
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%sext = sext i8 %trunc to i32
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%cmp = icmp slt i32 %sext, 36
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ret i1 %cmp
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}
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; CHECK: @icmp_shl16
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; CHECK-NEXT: %1 = trunc i32 %x to i16
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; CHECK-NEXT: %cmp = icmp slt i16 %1, 36
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define i1 @icmp_shl16(i32 %x) {
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%shl = shl i32 %x, 16
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%cmp = icmp slt i32 %shl, 2359296
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ret i1 %cmp
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}
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; CHECK: @icmp_shl24
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; CHECK-NEXT: %1 = trunc i32 %x to i8
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; CHECK-NEXT: %cmp = icmp slt i8 %1, 36
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define i1 @icmp_shl24(i32 %x) {
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%shl = shl i32 %x, 24
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%cmp = icmp slt i32 %shl, 603979776
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ret i1 %cmp
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}
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