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Replace more uses of sse41 with sse4.1.

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llc using the host cpu features and *waning* on unknown features is probably
not a good thing :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189144 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2013-08-23 20:39:19 +00:00
parent 56afd5e90b
commit 7cb1b5f5bf
39 changed files with 46 additions and 46 deletions
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2
test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mattr=+sse41
; RUN: llc < %s -mattr=+sse4.1
; rdar://5886601
; gcc testsuite: gcc.target/i386/sse4_1-pblendw.c
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"

4
test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
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@ -1,6 +1,6 @@
; REQUIRES: asserts
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn -stats 2>&1 | grep "4 machine-licm"
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn | FileCheck %s
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "4 machine-licm"
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s
; rdar://6627786
; rdar://7792037

2
test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
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@ -1,5 +1,5 @@
; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -asm-verbose=false \
; RUN: -mcpu=generic -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false -regalloc=basic < %s | \
; RUN: -mcpu=generic -disable-fp-elim -mattr=-sse4.1,-sse3,+sse2 -post-RA-scheduler=false -regalloc=basic < %s | \
; RUN: FileCheck %s
; rdar://6808032

2
test/CodeGen/X86/2011-09-18-sse2cmp.ll
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@ -1,4 +1,4 @@
;RUN: llc < %s -march=x86 -mcpu=yonah -mattr=+sse2,-sse41 | FileCheck %s
;RUN: llc < %s -march=x86 -mcpu=yonah -mattr=+sse2,-sse4.1 | FileCheck %s
;CHECK: @max
;CHECK: cmplepd

2
test/CodeGen/X86/2011-09-21-setcc-bug.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse41
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1
; Make sure we are not crashing on this code.

2
test/CodeGen/X86/2011-10-11-srl.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=-sse41
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=-sse4.1
target triple = "x86_64-unknown-linux-gnu"

4
test/CodeGen/X86/2011-12-15-vec_shift.ll
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@ -1,5 +1,5 @@
; RUN: llc -march=x86-64 -mattr=+sse41 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4
; RUN: llc -march=x86-64 -mattr=-sse41 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4
; RUN: llc -march=x86-64 -mattr=+sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4
; RUN: llc -march=x86-64 -mattr=-sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4
; Test case for r146671
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.7"

2
test/CodeGen/X86/2011-12-26-extractelement-duplicate-load.ll
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@ -1,4 +1,4 @@
; RUN: llc -march=x86-64 -mattr=-sse42,+sse41 < %s | FileCheck %s
; RUN: llc -march=x86-64 -mattr=-sse42,+sse4.1 < %s | FileCheck %s
; Make sure we don't load from the location pointed to by %p
; twice: it has non-obvious performance implications, and
; the relevant transformation doesn't know how to update

2
test/CodeGen/X86/blend-msb.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
; In this test we check that sign-extend of the mask bit is performed by

2
test/CodeGen/X86/crash-nosse.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mcpu=corei7 -mattr=-sse2,-sse41 -verify-machineinstrs
; RUN: llc < %s -mcpu=corei7 -mattr=-sse2,-sse4.1 -verify-machineinstrs
target triple = "x86_64-unknown-linux-gnu"
; PR10503

4
test/CodeGen/X86/floor-soft-float.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse41,-avx -soft-float=0 | FileCheck %s --check-prefix=CHECK-HARD-FLOAT
; RUN: llc < %s -march=x86-64 -mattr=+sse41,-avx -soft-float=1 | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx -soft-float=0 | FileCheck %s --check-prefix=CHECK-HARD-FLOAT
; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx -soft-float=1 | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
target triple = "x86_64-unknown-linux-gnu"

2
test/CodeGen/X86/fold-load-vec.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
; rdar://12721174
; We should not fold movss into pshufd since pshufd expects m128 while movss

6
test/CodeGen/X86/movgs.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse41 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -mattr=sse41 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -mattr=sse41 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64
define i32 @test1() nounwind readonly {
entry:

2
test/CodeGen/X86/neg_fp.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t
; RUN: llc < %s -march=x86 -mattr=+sse4.1 -o %t
; RUN: grep xorps %t | count 1
; Test that when we don't -enable-unsafe-fp-math, we don't do the optimization

2
test/CodeGen/X86/opt-shuff-tstore.ll
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@ -1,4 +1,4 @@
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s -mattr=+sse2,+sse41 | FileCheck %s
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s -mattr=+sse2,+sse4.1 | FileCheck %s
; CHECK: func_4_8
; A single memory write

2
test/CodeGen/X86/pmul.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=sse41 -mcpu=nehalem -stack-alignment=16 > %t
; RUN: llc < %s -march=x86 -mattr=sse4.1 -mcpu=nehalem -stack-alignment=16 > %t
; RUN: grep pmul %t | count 12
; RUN: grep mov %t | count 11

4
test/CodeGen/X86/pmulld.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse41 -asm-verbose=0 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse41 -asm-verbose=0 | FileCheck %s -check-prefix=WIN64
; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse4.1 -asm-verbose=0 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse4.1 -asm-verbose=0 | FileCheck %s -check-prefix=WIN64
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
; CHECK-LABEL: test1:

2
test/CodeGen/X86/pr10523.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse41
; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1
; No check in a crash test

2
test/CodeGen/X86/pr10524.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse41
; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1
; No check in a crash test

2
test/CodeGen/X86/pr10525.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse41
; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1
; No check in a crash test

2
test/CodeGen/X86/pr10526.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse41
; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1
; No check in a crash test

2
test/CodeGen/X86/pr12312.ll
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@ -1,4 +1,4 @@
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse41,-avx < %s | FileCheck %s --check-prefix SSE41
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx < %s | FileCheck %s --check-prefix SSE41
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx,-avx2 < %s | FileCheck %s --check-prefix AVX
define i32 @veccond128(<4 x i32> %input) {

2
test/CodeGen/X86/rounding-ops.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse41 | FileCheck -check-prefix=CHECK-SSE %s
; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse4.1 | FileCheck -check-prefix=CHECK-SSE %s
; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx | FileCheck -check-prefix=CHECK-AVX %s
define float @test1(float %x) nounwind {

2
test/CodeGen/X86/sse2-blend.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mcpu=yonah -mattr=+sse2,-sse41 | FileCheck %s
; RUN: llc < %s -march=x86 -mcpu=yonah -mattr=+sse2,-sse4.1 | FileCheck %s
; CHECK: vsel_float
; CHECK: pandn

2
test/CodeGen/X86/sse41-blend.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
;CHECK-LABEL: vsel_float:
;CHECK: blendvps

4
test/CodeGen/X86/sse41.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse41 -mcpu=penryn | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse41 -mcpu=penryn | FileCheck %s -check-prefix=X64
; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4.1 -mcpu=penryn | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse4.1 -mcpu=penryn | FileCheck %s -check-prefix=X64
@g16 = external global i16

2
test/CodeGen/X86/trunc-ext-ld-st.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
;CHECK-LABEL: load_2_i8:
; A single 16-bit load

2
test/CodeGen/X86/vec_extract-sse4.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse41 -o %t
; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse4.1 -o %t
; RUN: not grep extractps %t
; RUN: not grep pextrd %t
; RUN: not grep pshufd %t

2
test/CodeGen/X86/vec_fpext.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=+sse41,-avx | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse4.1,-avx | FileCheck %s
; RUN: llc < %s -march=x86 -mcpu=corei7-avx | FileCheck --check-prefix=AVX %s
; PR11674

2
test/CodeGen/X86/vec_insert-8.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t
; RUN: llc < %s -march=x86 -mattr=+sse4.1 -o %t
; tests variable insert and extract of a 4 x i32

2
test/CodeGen/X86/vec_insert-9.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=+sse41 > %t
; RUN: llc < %s -march=x86 -mattr=+sse4.1 > %t
; RUN: grep pinsrd %t | count 1
define <4 x i32> @var_insert2(<4 x i32> %x, i32 %val, i32 %idx) nounwind {

2
test/CodeGen/X86/vec_shift4.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse4.1 | FileCheck %s
define <2 x i64> @shl1(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp {
entry:

2
test/CodeGen/X86/vec_shuffle-25.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
; RUN: llc < %s -march=x86 -mattr=sse4.1 -o %t
; RUN: grep unpcklps %t | count 3
; RUN: grep unpckhps %t | count 1

2
test/CodeGen/X86/vec_shuffle-27.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=sse41 | FileCheck %s
; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=sse4.1 | FileCheck %s
; ModuleID = 'vec_shuffle-27.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"

2
test/CodeGen/X86/vec_shuffle-36.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mcpu=penryn -mattr=sse41 | FileCheck %s
; RUN: llc < %s -march=x86-64 -mcpu=penryn -mattr=sse4.1 | FileCheck %s
define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
; CHECK: pshufb

2
test/CodeGen/X86/vec_splat-3.ll
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@ -1,4 +1,4 @@
; RUN: llc <%s -march=x86 -mcpu=penryn -mattr=sse41 | FileCheck %s
; RUN: llc <%s -march=x86 -mcpu=penryn -mattr=sse4.1 | FileCheck %s
; Splat test for v8i16
define <8 x i16> @shuf_8i16_0(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {

2
test/CodeGen/X86/vec_ss_load_fold.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=+sse,+sse2,+sse41 | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse,+sse2,+sse4.1 | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin8.7.2"

2
test/CodeGen/X86/vector-variable-idx2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse41
; RUN: llc < %s -march=x86-64 -mattr=+sse4.1
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin11.0.0"

2
test/CodeGen/X86/widen_cast-6.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse4.1 | FileCheck %s
; CHECK: movd
; Test bit convert that requires widening in the operand.