diff --git a/include/llvm/MC/MCInstPrinter.h b/include/llvm/MC/MCInstPrinter.h
index 88295186328..d2ddc5bb42b 100644
--- a/include/llvm/MC/MCInstPrinter.h
+++ b/include/llvm/MC/MCInstPrinter.h
@@ -14,8 +14,8 @@ namespace llvm {
 class MCInst;
 class raw_ostream;
 class MCAsmInfo;
+class StringRef;
 
-  
 /// MCInstPrinter - This is an instance of a target assembly language printer
 /// that converts an MCInst to valid target assembly syntax.
 class MCInstPrinter {
@@ -40,6 +40,10 @@ public:
   /// printInst - Print the specified MCInst to the current raw_ostream.
   ///
   virtual void printInst(const MCInst *MI) = 0;
+  
+  /// getOpcodeName - Return the name of the specified opcode enum (e.g.
+  /// "MOV32ri") or empty if we can't resolve it.
+  virtual StringRef getOpcodeName(unsigned Opcode) const;
 };
   
 } // namespace llvm
diff --git a/lib/MC/MCAsmStreamer.cpp b/lib/MC/MCAsmStreamer.cpp
index 2a8f168f931..6add1b4abaa 100644
--- a/lib/MC/MCAsmStreamer.cpp
+++ b/lib/MC/MCAsmStreamer.cpp
@@ -617,6 +617,12 @@ void MCAsmStreamer::EmitInstruction(const MCInst &Inst) {
     raw_ostream &OS = GetCommentOS();
     OS << "<MCInst #" << Inst.getOpcode();
     
+    StringRef InstName;
+    if (InstPrinter)
+      InstName = InstPrinter->getOpcodeName(Inst.getOpcode());
+    if (!InstName.empty())
+      OS << ' ' << InstName;
+    
     for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) {
       OS << "\n  ";
       Inst.getOperand(i).print(OS, &MAI);
diff --git a/lib/MC/MCInstPrinter.cpp b/lib/MC/MCInstPrinter.cpp
index e90c03c0cf4..92a71541f5a 100644
--- a/lib/MC/MCInstPrinter.cpp
+++ b/lib/MC/MCInstPrinter.cpp
@@ -8,7 +8,14 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/MC/MCInstPrinter.h"
+#include "llvm/ADT/StringRef.h"
 using namespace llvm;
 
 MCInstPrinter::~MCInstPrinter() {
 }
+
+/// getOpcodeName - Return the name of the specified opcode enum (e.g.
+/// "MOV32ri") or empty if we can't resolve it.
+StringRef MCInstPrinter::getOpcodeName(unsigned Opcode) const {
+  return "";
+}
diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp
index 15510e844cb..5d745d24bdf 100644
--- a/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -282,11 +282,11 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
 /// size, and 3) use of X86-64 extended registers.
 static unsigned DetermineREXPrefix(const MCInst &MI, unsigned TSFlags,
                                    const TargetInstrDesc &Desc) {
-  unsigned REX = 0;
+  // Pseudo instructions shouldn't get here.
+  assert((TSFlags & X86II::FormMask) != X86II::Pseudo &&
+         "Can't encode pseudo instrs");
   
-  // Pseudo instructions do not need REX prefix byte.
-  if ((TSFlags & X86II::FormMask) == X86II::Pseudo)
-    return 0;
+  unsigned REX = 0;
   if (TSFlags & X86II::REX_W)
     REX |= 1 << 3;