Ensure that the nop that should follow a bl call in PPC64 ELF actually does

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146664 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2011-12-15 17:54:01 +00:00
parent 7e56831a68
commit 7f370b6155
2 changed files with 14 additions and 0 deletions

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@ -61,6 +61,7 @@ void PPCHazardRecognizer440::EmitInstruction(SUnit *SU) {
PPCHazardRecognizer970::PPCHazardRecognizer970(const TargetInstrInfo &tii)
: TII(tii) {
LastWasBL8_ELF = false;
EndDispatchGroup();
}
@ -132,6 +133,14 @@ getHazardType(SUnit *SU, int Stalls) {
unsigned Opcode = MI->getOpcode();
// If the last instruction was a BL8_ELF, then the NOP must follow it
// directly (this is strong requirement from the linker due to the ELF ABI).
// We return only Hazard (and not NoopHazard) because if the NOP is necessary
// then it will already be in the instruction stream (it is not always
// necessary; tail calls, for example, do not need it).
if (LastWasBL8_ELF && Opcode != PPC::NOP)
return Hazard;
bool isFirst, isSingle, isCracked, isLoad, isStore;
PPCII::PPC970_Unit InstrType =
GetInstrType(Opcode, isFirst, isSingle, isCracked,
@ -190,6 +199,7 @@ void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) {
return;
unsigned Opcode = MI->getOpcode();
LastWasBL8_ELF = (Opcode == PPC::BL8_ELF);
bool isFirst, isSingle, isCracked, isLoad, isStore;
PPCII::PPC970_Unit InstrType =
@ -230,6 +240,7 @@ void PPCHazardRecognizer970::AdvanceCycle() {
}
void PPCHazardRecognizer970::Reset() {
LastWasBL8_ELF = false;
EndDispatchGroup();
}

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@ -49,6 +49,9 @@ class PPCHazardRecognizer970 : public ScheduleHazardRecognizer {
// HasCTRSet - If the CTR register is set in this group, disallow BCTRL.
bool HasCTRSet;
// Was the last instruction issued a BL8_ELF
bool LastWasBL8_ELF;
// StoredPtr - Keep track of the address of any store. If we see a load from
// the same address (or one that aliases it), disallow the store. We can have
// up to four stores in one dispatch group, hence we track up to 4.