From 7f7b346e3d596ccd3d8b5ff1ba39b40a9b90900e Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Tue, 20 Jun 2006 23:21:20 +0000
Subject: [PATCH] Make these predicates correct in 64-bit mode too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/PowerPC/PPCInstrInfo.td | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index aeb01428b37..848bc3f18d5 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -122,12 +122,15 @@ def HA16 : SDNodeXForm<imm, [{
 def immSExt16  : PatLeaf<(imm), [{
   // immSExt16 predicate - True if the immediate fits in a 16-bit sign extended
   // field.  Used by instructions like 'addi'.
-  return (int)N->getValue() == (short)N->getValue();
+  if (N->getValueType(0) == MVT::i32)
+    return (int32_t)N->getValue() == (short)N->getValue();
+  else
+    return (int64_t)N->getValue() == (short)N->getValue();
 }]>;
 def immZExt16  : PatLeaf<(imm), [{
   // immZExt16 predicate - True if the immediate fits in a 16-bit zero extended
   // field.  Used by instructions like 'ori'.
-  return (unsigned)N->getValue() == (unsigned short)N->getValue();
+  return (uint64_t)N->getValue() == (unsigned short)N->getValue();
 }], LO16>;
 
 // imm16Shifted* - These match immediates where the low 16-bits are zero.  There