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MIRParser: Use shorter cfi identifiers

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In an instruction like:
	CFI_INSTRUCTION .cfi_def_cfa ...
we can drop the '.cfi_' prefix since that should be obvious by the
context:
	CFI_INSTRUCTION def_cfa ...

While being a terser and cleaner syntax this also prepares to dropping
support for identifiers starting with a dot character so we can use it
for expressions.

Differential Revision: http://reviews.llvm.org/D22388

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276785 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun 2016-07-26 18:20:00 +00:00
parent e20e4c151f
commit 7fdf5b1885
20 changed files with 75 additions and 75 deletions
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10
lib/CodeGen/MIRParser/MILexer.cpp
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@ -205,11 +205,11 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
.Case("tied-def", MIToken::kw_tied_def)
.Case("frame-setup", MIToken::kw_frame_setup)
.Case("debug-location", MIToken::kw_debug_location)
.Case(".cfi_same_value", MIToken::kw_cfi_same_value)
.Case(".cfi_offset", MIToken::kw_cfi_offset)
.Case(".cfi_def_cfa_register", MIToken::kw_cfi_def_cfa_register)
.Case(".cfi_def_cfa_offset", MIToken::kw_cfi_def_cfa_offset)
.Case(".cfi_def_cfa", MIToken::kw_cfi_def_cfa)
.Case("same_value", MIToken::kw_cfi_same_value)
.Case("offset", MIToken::kw_cfi_offset)
.Case("def_cfa_register", MIToken::kw_cfi_def_cfa_register)
.Case("def_cfa_offset", MIToken::kw_cfi_def_cfa_offset)
.Case("def_cfa", MIToken::kw_cfi_def_cfa)
.Case("blockaddress", MIToken::kw_blockaddress)
.Case("target-index", MIToken::kw_target_index)
.Case("half", MIToken::kw_half)

10
lib/CodeGen/MIRPrinter.cpp
View File

@ -962,32 +962,32 @@ void MIPrinter::print(const MCCFIInstruction &CFI,
const TargetRegisterInfo *TRI) {
switch (CFI.getOperation()) {
case MCCFIInstruction::OpSameValue:
OS << ".cfi_same_value ";
OS << "same_value ";
if (CFI.getLabel())
OS << "<mcsymbol> ";
printCFIRegister(CFI.getRegister(), OS, TRI);
break;
case MCCFIInstruction::OpOffset:
OS << ".cfi_offset ";
OS << "offset ";
if (CFI.getLabel())
OS << "<mcsymbol> ";
printCFIRegister(CFI.getRegister(), OS, TRI);
OS << ", " << CFI.getOffset();
break;
case MCCFIInstruction::OpDefCfaRegister:
OS << ".cfi_def_cfa_register ";
OS << "def_cfa_register ";
if (CFI.getLabel())
OS << "<mcsymbol> ";
printCFIRegister(CFI.getRegister(), OS, TRI);
break;
case MCCFIInstruction::OpDefCfaOffset:
OS << ".cfi_def_cfa_offset ";
OS << "def_cfa_offset ";
if (CFI.getLabel())
OS << "<mcsymbol> ";
OS << CFI.getOffset();
break;
case MCCFIInstruction::OpDefCfa:
OS << ".cfi_def_cfa ";
OS << "def_cfa ";
if (CFI.getLabel())
OS << "<mcsymbol> ";
printCFIRegister(CFI.getRegister(), OS, TRI);

6
test/CodeGen/ARM/ARMLoadStoreDBG.mir
View File

@ -144,9 +144,9 @@ body: |
liveins: %r0, %r2, %r3, %r7, %lr
%sp = frame-setup t2STMDB_UPD %sp, 14, _, killed %r7, killed %lr
frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8
frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4
frame-setup CFI_INSTRUCTION .cfi_offset %r7, -8
frame-setup CFI_INSTRUCTION def_cfa_offset 8
frame-setup CFI_INSTRUCTION offset %lr, -4
frame-setup CFI_INSTRUCTION offset %r7, -8
DBG_VALUE debug-use %r0, debug-use _, !18, !27, debug-location !28
DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28
DBG_VALUE debug-use %r2, debug-use _, !20, !27, debug-location !28

10
test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
View File

@ -1,5 +1,5 @@
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa operands
# This test ensures that the MIR parser parses the def_cfa operands
# correctly.
--- |
@ -21,10 +21,10 @@ body: |
%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
%fp = frame-setup ADDXri %sp, 0, 0
; CHECK: CFI_INSTRUCTION .cfi_def_cfa %w29, 16
frame-setup CFI_INSTRUCTION .cfi_def_cfa %w29, 16
frame-setup CFI_INSTRUCTION .cfi_offset %w30, -8
frame-setup CFI_INSTRUCTION .cfi_offset %w29, -16
; CHECK: CFI_INSTRUCTION def_cfa %w29, 16
frame-setup CFI_INSTRUCTION def_cfa %w29, 16
frame-setup CFI_INSTRUCTION offset %w30, -8
frame-setup CFI_INSTRUCTION offset %w29, -16
BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
%sp, %fp, %lr = LDPXpost %sp, 2
RET_ReallyLR

30
test/CodeGen/MIR/ARM/cfi-same-value.mir
View File

@ -32,9 +32,9 @@ body: |
liveins: %r11, %lr
%sp = STMDB_UPD %sp, 14, _, %r4, %r5
CFI_INSTRUCTION .cfi_def_cfa_offset 8
CFI_INSTRUCTION .cfi_offset %r5, -4
CFI_INSTRUCTION .cfi_offset %r4, -8
CFI_INSTRUCTION def_cfa_offset 8
CFI_INSTRUCTION offset %r5, -4
CFI_INSTRUCTION offset %r4, -8
%r5 = MOVr %sp, 14, _, _
%r4 = MRC 15, 0, 13, 0, 3, 14, _
%r4 = LDRi12 %r4, 4, 14, _
@ -48,29 +48,29 @@ body: |
%r4 = MOVi 48, 14, _, _
%r5 = MOVi 0, 14, _, _
%sp = STMDB_UPD %sp, 14, _, %lr
CFI_INSTRUCTION .cfi_def_cfa_offset 12
CFI_INSTRUCTION .cfi_offset %lr, -12
CFI_INSTRUCTION def_cfa_offset 12
CFI_INSTRUCTION offset %lr, -12
BL $__morestack, implicit-def %lr, implicit %sp
%sp = LDMIA_UPD %sp, 14, _, %lr
%sp = LDMIA_UPD %sp, 14, _, %r4, %r5
CFI_INSTRUCTION .cfi_def_cfa_offset 0
CFI_INSTRUCTION def_cfa_offset 0
BX_RET 14, _
bb.2:
liveins: %r11, %lr
%sp = LDMIA_UPD %sp, 14, _, %r4, %r5
CFI_INSTRUCTION .cfi_def_cfa_offset 0
; CHECK: CFI_INSTRUCTION .cfi_same_value %r4
; CHECK-NEXT: CFI_INSTRUCTION .cfi_same_value %r5
CFI_INSTRUCTION .cfi_same_value %r4
CFI_INSTRUCTION .cfi_same_value %r5
CFI_INSTRUCTION def_cfa_offset 0
; CHECK: CFI_INSTRUCTION same_value %r4
; CHECK-NEXT: CFI_INSTRUCTION same_value %r5
CFI_INSTRUCTION same_value %r4
CFI_INSTRUCTION same_value %r5
%sp = frame-setup STMDB_UPD %sp, 14, _, killed %r11, killed %lr
frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8
frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4
frame-setup CFI_INSTRUCTION .cfi_offset %r11, -8
frame-setup CFI_INSTRUCTION def_cfa_offset 8
frame-setup CFI_INSTRUCTION offset %lr, -4
frame-setup CFI_INSTRUCTION offset %r11, -8
%sp = frame-setup SUBri killed %sp, 40, 14, _, _
frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 48
frame-setup CFI_INSTRUCTION def_cfa_offset 48
%r0 = MOVr %sp, 14, _, _
%r1 = MOVi 10, 14, _, _
BL @dummy_use, csr_aapcs, implicit-def dead %lr, implicit %sp, implicit %r0, implicit killed %r1, implicit-def %sp

6
test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir
View File

@ -145,9 +145,9 @@ body: |
DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28
tBX_RET 3, %cpsr, implicit %r0, debug-location !34
%sp = frame-setup t2STMDB_UPD %sp, 14, _, killed %r7, killed %lr
frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8
frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4
frame-setup CFI_INSTRUCTION .cfi_offset %r7, -8
frame-setup CFI_INSTRUCTION def_cfa_offset 8
frame-setup CFI_INSTRUCTION offset %lr, -4
frame-setup CFI_INSTRUCTION offset %r7, -8
DBG_VALUE debug-use %r0, debug-use _, !18, !27, debug-location !28
DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28
DBG_VALUE debug-use %r2, debug-use _, !20, !27, debug-location !28

12
test/CodeGen/MIR/Mips/memory-operands.mir
View File

@ -44,8 +44,8 @@ body: |
liveins: %a0, %ra
Save16 %ra, 24, implicit-def %sp, implicit %sp
CFI_INSTRUCTION .cfi_def_cfa_offset 24
CFI_INSTRUCTION .cfi_offset %ra_64, -4
CFI_INSTRUCTION def_cfa_offset 24
CFI_INSTRUCTION offset %ra_64, -4
%v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp
%v0 = SllX16 killed %v0, 16
%v0 = AdduRxRyRz16 killed %v1, killed %v0
@ -80,10 +80,10 @@ body: |
liveins: %ra, %s2, %s0, %ra, %s2, %s0
SaveX16 %s0, %ra, %s2, 32, implicit-def %sp, implicit %sp
CFI_INSTRUCTION .cfi_def_cfa_offset 32
CFI_INSTRUCTION .cfi_offset %ra_64, -4
CFI_INSTRUCTION .cfi_offset %s2_64, -8
CFI_INSTRUCTION .cfi_offset %s0_64, -12
CFI_INSTRUCTION def_cfa_offset 32
CFI_INSTRUCTION offset %ra_64, -4
CFI_INSTRUCTION offset %s2_64, -8
CFI_INSTRUCTION offset %s0_64, -12
%v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp
%v0 = SllX16 killed %v0, 16
%s0 = AdduRxRyRz16 killed %v1, killed %v0

6
test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
View File

@ -1,5 +1,5 @@
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands
# This test ensures that the MIR parser parses the cfi offset operands
# correctly.
--- |
@ -21,8 +21,8 @@ stack:
body: |
bb.0.entry:
%rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags
; CHECK: CFI_INSTRUCTION .cfi_def_cfa_offset 4048
CFI_INSTRUCTION .cfi_def_cfa_offset 4048
; CHECK: CFI_INSTRUCTION def_cfa_offset 4048
CFI_INSTRUCTION def_cfa_offset 4048
%rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
RETQ
...

10
test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
View File

@ -1,5 +1,5 @@
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa_register
# This test ensures that the MIR parser parses the cfi def_cfa_register
# operands correctly.
--- |
@ -24,9 +24,9 @@ body: |
liveins: %rbp
PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
CFI_INSTRUCTION .cfi_offset %rbp, -16
CFI_INSTRUCTION def_cfa_offset 16
CFI_INSTRUCTION offset %rbp, -16
%rbp = MOV64rr %rsp
; CHECK: CFI_INSTRUCTION .cfi_def_cfa_register %rbp
CFI_INSTRUCTION .cfi_def_cfa_register %rbp
; CHECK: CFI_INSTRUCTION def_cfa_register %rbp
CFI_INSTRUCTION def_cfa_register %rbp
...

8
test/CodeGen/MIR/X86/cfi-offset.mir
View File

@ -1,5 +1,5 @@
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_offset operands
# This test ensures that the MIR parser parses the cfi offset operands
# correctly.
--- |
@ -31,9 +31,9 @@ body: |
liveins: %ecx, %edi, %edx, %esi, %rbx
PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
; CHECK: CFI_INSTRUCTION .cfi_offset %rbx, -16
CFI_INSTRUCTION .cfi_offset %rbx, -16
CFI_INSTRUCTION def_cfa_offset 16
; CHECK: CFI_INSTRUCTION offset %rbx, -16
CFI_INSTRUCTION offset %rbx, -16
%ebx = COPY %edi, implicit-def %rbx
%ebx = ADD32rr %ebx, killed %esi, implicit-def dead %eflags
%ebx = ADD32rr %ebx, killed %edx, implicit-def dead %eflags

2
test/CodeGen/MIR/X86/early-clobber-register-flag.mir
View File

@ -33,7 +33,7 @@ body: |
liveins: %edi, %esi
frame-setup PUSH64r undef %rax, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
CFI_INSTRUCTION def_cfa_offset 16
%ecx = COPY %edi
%ecx = ADD32rr killed %ecx, killed %esi, implicit-def dead %eflags
; CHECK: INLINEASM $nop, 1, 12, implicit-def dead early-clobber %ax, 12, implicit-def dead early-clobber %di

6
test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
View File

@ -27,9 +27,9 @@ fixedStack:
body: |
bb.0.entry:
PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
; CHECK: [[@LINE+1]]:38: expected ','
CFI_INSTRUCTION .cfi_offset %rbx -16
CFI_INSTRUCTION def_cfa_offset 16
; CHECK: [[@LINE+1]]:33: expected ','
CFI_INSTRUCTION offset %rbx -16
%ebx = COPY %edi, implicit-def %rbx
%ebx = ADD32rr %ebx, killed %esi, implicit-def dead %eflags
%ebx = ADD32rr %ebx, killed %edx, implicit-def dead %eflags

4
test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
View File

@ -19,8 +19,8 @@ stack:
body: |
bb.0.entry:
%rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags
; CHECK: [[@LINE+1]]:41: expected a cfi offset
CFI_INSTRUCTION .cfi_def_cfa_offset _
; CHECK: [[@LINE+1]]:36: expected a cfi offset
CFI_INSTRUCTION def_cfa_offset _
%rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
RETQ
...

6
test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
View File

@ -27,9 +27,9 @@ fixedStack:
body: |
bb.0.entry:
PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
; CHECK: [[@LINE+1]]:33: expected a cfi register
CFI_INSTRUCTION .cfi_offset %0, -16
CFI_INSTRUCTION def_cfa_offset 16
; CHECK: [[@LINE+1]]:28: expected a cfi register
CFI_INSTRUCTION offset %0, -16
%ebx = COPY %edi, implicit-def %rbx
%ebx = ADD32rr %ebx, killed %esi, implicit-def dead %eflags
%ebx = ADD32rr %ebx, killed %edx, implicit-def dead %eflags

2
test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
View File

@ -29,7 +29,7 @@ stack:
body: |
bb.0.entry:
frame-setup PUSH32r undef %eax, implicit-def %esp, implicit %esp
CFI_INSTRUCTION .cfi_def_cfa_offset 8
CFI_INSTRUCTION def_cfa_offset 8
; CHECK: name: test
; CHECK: %eax = MOV32rm %esp, 1, _, 8, _ :: (load 4 from %fixed-stack.0, align 16)
%eax = MOV32rm %esp, 1, _, 8, _ :: (load 4 from %fixed-stack.0, align 16)

4
test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
View File

@ -19,8 +19,8 @@ stack:
body: |
bb.0.entry:
%rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags
; CHECK: [[@LINE+1]]:41: expected a 32 bit integer (the cfi offset is too large)
CFI_INSTRUCTION .cfi_def_cfa_offset 123456789123456
; CHECK: [[@LINE+1]]:36: expected a 32 bit integer (the cfi offset is too large)
CFI_INSTRUCTION def_cfa_offset 123456789123456
%rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
RETQ
...

6
test/CodeGen/MIR/X86/liveout-register-mask.mir
View File

@ -31,10 +31,10 @@ body: |
liveins: %rdi, %rsi, %rbp
frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
CFI_INSTRUCTION .cfi_offset %rbp, -16
CFI_INSTRUCTION def_cfa_offset 16
CFI_INSTRUCTION offset %rbp, -16
%rbp = frame-setup MOV64rr %rsp
CFI_INSTRUCTION .cfi_def_cfa_register %rbp
CFI_INSTRUCTION def_cfa_register %rbp
; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, liveout(%esp, %rsp, %sp, %spl),
PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, liveout(%esp, %rsp, %sp, %spl), implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
%rbp = POP64r implicit-def %rsp, implicit %rsp

2
test/CodeGen/MIR/X86/memory-operands.mir
View File

@ -354,7 +354,7 @@ fixedStack:
body: |
bb.0.entry:
%rsp = frame-setup SUB64ri8 %rsp, 24, implicit-def dead %eflags
CFI_INSTRUCTION .cfi_def_cfa_offset 32
CFI_INSTRUCTION def_cfa_offset 32
LD_F80m %rsp, 1, _, 32, _, implicit-def dead %fpsw
; CHECK: name: stack_psv
; CHECK: ST_FP80m %rsp, 1, _, 0, _, implicit-def dead %fpsw :: (store 10 into stack, align 16)

6
test/CodeGen/X86/patchpoint-verifiable.mir
View File

@ -31,10 +31,10 @@ body: |
liveins: %rdi, %rsi, %rbp
frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
CFI_INSTRUCTION .cfi_offset %rbp, -16
CFI_INSTRUCTION def_cfa_offset 16
CFI_INSTRUCTION offset %rbp, -16
%rbp = frame-setup MOV64rr %rsp
CFI_INSTRUCTION .cfi_def_cfa_register %rbp
CFI_INSTRUCTION def_cfa_register %rbp
; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
%rbp = POP64r implicit-def %rsp, implicit %rsp

4
test/DebugInfo/MIR/X86/live-debug-values.mir
View File

@ -193,8 +193,8 @@ body: |
liveins: %edi, %rsi, %rbx
frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
CFI_INSTRUCTION .cfi_offset %rbx, -16
CFI_INSTRUCTION def_cfa_offset 16
CFI_INSTRUCTION offset %rbx, -16
DBG_VALUE debug-use %edi, debug-use _, !12, !20, debug-location !21
DBG_VALUE debug-use %rsi, debug-use _, !13, !20, debug-location !22
%eax = MOV32rr %edi