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MIR Serialization: Serialize the base alignment for the machine memory operands.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244357 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alex Lorenz 2015-08-07 20:48:30 +00:00
parent 74e6108fa5
commit 812f70661d
7 changed files with 113 additions and 4 deletions
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1
lib/CodeGen/MIRParser/MILexer.cpp
View File

@ -200,6 +200,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
.Case("volatile", MIToken::kw_volatile)
.Case("non-temporal", MIToken::kw_non_temporal)
.Case("invariant", MIToken::kw_invariant)
.Case("align", MIToken::kw_align)
.Default(MIToken::Identifier);
}

1
lib/CodeGen/MIRParser/MILexer.h
View File

@ -69,6 +69,7 @@ struct MIToken {
kw_volatile,
kw_non_temporal,
kw_invariant,
kw_align,
// Identifier tokens
Identifier,

17
lib/CodeGen/MIRParser/MIParser.cpp
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@ -1128,13 +1128,24 @@ bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
int64_t Offset = 0;
if (parseOffset(Offset))
return true;
// TODO: Parse the base alignment.
unsigned BaseAlignment = Size;
if (Token.is(MIToken::comma)) {
lex();
if (Token.isNot(MIToken::kw_align))
return error("expected 'align'");
lex();
if (Token.isNot(MIToken::IntegerLiteral))
return error("expected an integer literal after 'align'");
if (getUnsigned(BaseAlignment))
return true;
lex();
}
// TODO: Parse the attached metadata nodes.
if (expectAndConsume(MIToken::rparen))
return true;
Dest =
MF.getMachineMemOperand(MachinePointerInfo(V, Offset), Flags, Size, Size);
Dest = MF.getMachineMemOperand(MachinePointerInfo(V, Offset), Flags, Size,
BaseAlignment);
return false;
}

3
lib/CodeGen/MIRPrinter.cpp
View File

@ -679,7 +679,8 @@ void MIPrinter::print(const MachineMemOperand &Op) {
printIRValueReference(*Val);
// TODO: Print PseudoSourceValue.
printOffset(Op.getOffset());
// TODO: Print the base alignment.
if (Op.getBaseAlignment() != Op.getSize())
OS << ", align " << Op.getBaseAlignment();
// TODO: Print the metadata attributes.
OS << ')';
}

32
test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir Normal file
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@ -0,0 +1,32 @@
# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
define void @memory_alignment(<8 x float>* %vec) {
entry:
%v = load <8 x float>, <8 x float>* %vec
%v2 = insertelement <8 x float> %v, float 0.0, i32 4
store <8 x float> %v2, <8 x float>* %vec
ret void
}
...
---
name: memory_alignment
tracksRegLiveness: true
liveins:
- { reg: '%rdi' }
body:
- id: 0
name: entry
liveins: [ '%rdi' ]
instructions:
# CHECK: [[@LINE+1]]:70: expected 'align'
- '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, 32)'
- '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)'
- '%xmm2 = FsFLD0SS'
- '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
- 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)'
- 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)'
- RETQ
...

32
test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir Normal file
View File

@ -0,0 +1,32 @@
# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
define void @memory_alignment(<8 x float>* %vec) {
entry:
%v = load <8 x float>, <8 x float>* %vec
%v2 = insertelement <8 x float> %v, float 0.0, i32 4
store <8 x float> %v2, <8 x float>* %vec
ret void
}
...
---
name: memory_alignment
tracksRegLiveness: true
liveins:
- { reg: '%rdi' }
body:
- id: 0
name: entry
liveins: [ '%rdi' ]
instructions:
# CHECK: [[@LINE+1]]:75: expected an integer literal after 'align'
- '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align)'
- '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)'
- '%xmm2 = FsFLD0SS'
- '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
- 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)'
- 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)'
- RETQ
...

31
test/CodeGen/MIR/X86/memory-operands.mir
View File

@ -51,6 +51,14 @@
ret void
}
define void @memory_alignment(<8 x float>* %vec) {
entry:
%v = load <8 x float>, <8 x float>* %vec
%v2 = insertelement <8 x float> %v, float 0.0, i32 4
store <8 x float> %v2, <8 x float>* %vec
ret void
}
...
---
name: test
@ -154,3 +162,26 @@ body:
- 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)'
- RETQ
...
---
name: memory_alignment
tracksRegLiveness: true
liveins:
- { reg: '%rdi' }
body:
- id: 0
name: entry
liveins: [ '%rdi' ]
instructions:
# CHECK: name: memory_alignment
# CHECK: %xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)
# CHECK-NEXT: %xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)
# CHECK: MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)
# CHECK-NEXT: MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)
- '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)'
- '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)'
- '%xmm2 = FsFLD0SS'
- '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
- 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)'
- 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)'
- RETQ
...