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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177909 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
NAKAMURA Takumi
parent
c76067b774
commit
8173c5e7c8
@ -61,7 +61,7 @@ static int modRMRequired(OpcodeType type,
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InstructionContext insnContext,
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uint8_t opcode) {
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const struct ContextDecision* decision = 0;
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switch (type) {
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case ONEBYTE:
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decision = &ONEBYTE_SYM;
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@ -102,7 +102,7 @@ static InstrUID decode(OpcodeType type,
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uint8_t opcode,
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uint8_t modRM) {
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const struct ModRMDecision* dec = 0;
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switch (type) {
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case ONEBYTE:
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dec = &ONEBYTE_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
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@ -123,7 +123,7 @@ static InstrUID decode(OpcodeType type,
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dec = &THREEBYTEA7_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
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break;
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}
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switch (dec->modrm_type) {
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default:
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debug("Corrupt table! Unknown modrm_type");
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@ -171,10 +171,10 @@ static const struct InstructionSpecifier *specifierForUID(InstrUID uid) {
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*/
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static int consumeByte(struct InternalInstruction* insn, uint8_t* byte) {
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int ret = insn->reader(insn->readerArg, byte, insn->readerCursor);
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if (!ret)
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++(insn->readerCursor);
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return ret;
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}
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@ -238,19 +238,19 @@ CONSUME_FUNC(consumeUInt64, uint64_t)
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*/
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static void dbgprintf(struct InternalInstruction* insn,
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const char* format,
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...) {
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...) {
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char buffer[256];
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va_list ap;
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if (!insn->dlog)
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return;
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va_start(ap, format);
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(void)vsnprintf(buffer, sizeof(buffer), format, ap);
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va_end(ap);
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insn->dlog(insn->dlogArg, buffer);
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return;
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}
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@ -305,15 +305,15 @@ static int readPrefixes(struct InternalInstruction* insn) {
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BOOL prefixGroups[4] = { FALSE };
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uint64_t prefixLocation;
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uint8_t byte = 0;
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BOOL hasAdSize = FALSE;
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BOOL hasOpSize = FALSE;
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dbgprintf(insn, "readPrefixes()");
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while (isPrefix) {
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prefixLocation = insn->readerCursor;
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if (consumeByte(insn, &byte))
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return -1;
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@ -400,21 +400,21 @@ static int readPrefixes(struct InternalInstruction* insn) {
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isPrefix = FALSE;
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break;
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}
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if (isPrefix)
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dbgprintf(insn, "Found prefix 0x%hhx", byte);
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}
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insn->vexSize = 0;
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if (byte == 0xc4) {
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uint8_t byte1;
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if (lookAtByte(insn, &byte1)) {
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dbgprintf(insn, "Couldn't read second byte of VEX");
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return -1;
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}
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if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) {
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insn->vexSize = 3;
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insn->necessaryPrefixLocation = insn->readerCursor - 1;
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@ -423,67 +423,67 @@ static int readPrefixes(struct InternalInstruction* insn) {
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unconsumeByte(insn);
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insn->necessaryPrefixLocation = insn->readerCursor - 1;
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}
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if (insn->vexSize == 3) {
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insn->vexPrefix[0] = byte;
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consumeByte(insn, &insn->vexPrefix[1]);
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consumeByte(insn, &insn->vexPrefix[2]);
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/* We simulate the REX prefix for simplicity's sake */
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if (insn->mode == MODE_64BIT) {
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insn->rexPrefix = 0x40
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insn->rexPrefix = 0x40
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| (wFromVEX3of3(insn->vexPrefix[2]) << 3)
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| (rFromVEX2of3(insn->vexPrefix[1]) << 2)
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| (xFromVEX2of3(insn->vexPrefix[1]) << 1)
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| (bFromVEX2of3(insn->vexPrefix[1]) << 0);
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}
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switch (ppFromVEX3of3(insn->vexPrefix[2]))
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{
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default:
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break;
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case VEX_PREFIX_66:
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hasOpSize = TRUE;
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hasOpSize = TRUE;
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break;
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}
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dbgprintf(insn, "Found VEX prefix 0x%hhx 0x%hhx 0x%hhx", insn->vexPrefix[0], insn->vexPrefix[1], insn->vexPrefix[2]);
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}
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}
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else if (byte == 0xc5) {
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uint8_t byte1;
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if (lookAtByte(insn, &byte1)) {
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dbgprintf(insn, "Couldn't read second byte of VEX");
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return -1;
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}
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if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) {
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insn->vexSize = 2;
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}
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else {
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unconsumeByte(insn);
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}
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if (insn->vexSize == 2) {
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insn->vexPrefix[0] = byte;
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consumeByte(insn, &insn->vexPrefix[1]);
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if (insn->mode == MODE_64BIT) {
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insn->rexPrefix = 0x40
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insn->rexPrefix = 0x40
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| (rFromVEX2of2(insn->vexPrefix[1]) << 2);
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}
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switch (ppFromVEX2of2(insn->vexPrefix[1]))
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{
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default:
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break;
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case VEX_PREFIX_66:
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hasOpSize = TRUE;
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hasOpSize = TRUE;
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break;
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}
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dbgprintf(insn, "Found VEX prefix 0x%hhx 0x%hhx", insn->vexPrefix[0], insn->vexPrefix[1]);
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}
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}
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@ -491,17 +491,17 @@ static int readPrefixes(struct InternalInstruction* insn) {
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if (insn->mode == MODE_64BIT) {
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if ((byte & 0xf0) == 0x40) {
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uint8_t opcodeByte;
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if (lookAtByte(insn, &opcodeByte) || ((opcodeByte & 0xf0) == 0x40)) {
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dbgprintf(insn, "Redundant REX prefix");
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return -1;
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}
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insn->rexPrefix = byte;
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insn->necessaryPrefixLocation = insn->readerCursor - 2;
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dbgprintf(insn, "Found REX prefix 0x%hhx", byte);
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} else {
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} else {
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unconsumeByte(insn);
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insn->necessaryPrefixLocation = insn->readerCursor - 1;
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}
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@ -539,7 +539,7 @@ static int readPrefixes(struct InternalInstruction* insn) {
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insn->immediateSize = (hasOpSize ? 2 : 4);
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}
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}
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return 0;
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}
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@ -550,22 +550,22 @@ static int readPrefixes(struct InternalInstruction* insn) {
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* @param insn - The instruction whose opcode is to be read.
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* @return - 0 if the opcode could be read successfully; nonzero otherwise.
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*/
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static int readOpcode(struct InternalInstruction* insn) {
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static int readOpcode(struct InternalInstruction* insn) {
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/* Determine the length of the primary opcode */
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uint8_t current;
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dbgprintf(insn, "readOpcode()");
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insn->opcodeType = ONEBYTE;
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if (insn->vexSize == 3)
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{
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switch (mmmmmFromVEX2of3(insn->vexPrefix[1]))
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{
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default:
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dbgprintf(insn, "Unhandled m-mmmm field for instruction (0x%hhx)", mmmmmFromVEX2of3(insn->vexPrefix[1]));
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return -1;
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return -1;
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case 0:
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break;
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case VEX_LOB_0F:
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@ -577,7 +577,7 @@ static int readOpcode(struct InternalInstruction* insn) {
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insn->threeByteEscape = 0x38;
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insn->opcodeType = THREEBYTE_38;
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return consumeByte(insn, &insn->opcode);
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case VEX_LOB_0F3A:
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case VEX_LOB_0F3A:
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insn->twoByteEscape = 0x0f;
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insn->threeByteEscape = 0x3a;
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insn->opcodeType = THREEBYTE_3A;
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@ -590,68 +590,68 @@ static int readOpcode(struct InternalInstruction* insn) {
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insn->opcodeType = TWOBYTE;
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return consumeByte(insn, &insn->opcode);
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}
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if (consumeByte(insn, ¤t))
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return -1;
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if (current == 0x0f) {
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dbgprintf(insn, "Found a two-byte escape prefix (0x%hhx)", current);
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insn->twoByteEscape = current;
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if (consumeByte(insn, ¤t))
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return -1;
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if (current == 0x38) {
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dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
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insn->threeByteEscape = current;
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if (consumeByte(insn, ¤t))
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return -1;
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insn->opcodeType = THREEBYTE_38;
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} else if (current == 0x3a) {
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dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
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insn->threeByteEscape = current;
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if (consumeByte(insn, ¤t))
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return -1;
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insn->opcodeType = THREEBYTE_3A;
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} else if (current == 0xa6) {
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dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
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insn->threeByteEscape = current;
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if (consumeByte(insn, ¤t))
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return -1;
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insn->opcodeType = THREEBYTE_A6;
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} else if (current == 0xa7) {
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dbgprintf(insn, "Found a three-byte escape prefix (0x%hhx)", current);
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insn->threeByteEscape = current;
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if (consumeByte(insn, ¤t))
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return -1;
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insn->opcodeType = THREEBYTE_A7;
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} else {
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dbgprintf(insn, "Didn't find a three-byte escape prefix");
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insn->opcodeType = TWOBYTE;
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}
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}
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/*
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* At this point we have consumed the full opcode.
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* Anything we consume from here on must be unconsumed.
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*/
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insn->opcode = current;
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return 0;
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}
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@ -673,19 +673,19 @@ static int getIDWithAttrMask(uint16_t* instructionID,
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struct InternalInstruction* insn,
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uint8_t attrMask) {
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BOOL hasModRMExtension;
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uint8_t instructionClass;
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instructionClass = contextForAttrs(attrMask);
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hasModRMExtension = modRMRequired(insn->opcodeType,
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instructionClass,
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insn->opcode);
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if (hasModRMExtension) {
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if (readModRM(insn))
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return -1;
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*instructionID = decode(insn->opcodeType,
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instructionClass,
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insn->opcode,
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@ -696,7 +696,7 @@ static int getIDWithAttrMask(uint16_t* instructionID,
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insn->opcode,
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0);
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}
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return 0;
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}
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@ -709,7 +709,7 @@ static int getIDWithAttrMask(uint16_t* instructionID,
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*/
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static BOOL is16BitEquivalent(const char* orig, const char* equiv) {
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off_t i;
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for (i = 0;; i++) {
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if (orig[i] == '\0' && equiv[i] == '\0')
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return TRUE;
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@ -728,8 +728,8 @@ static BOOL is16BitEquivalent(const char* orig, const char* equiv) {
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}
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/*
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* getID - Determines the ID of an instruction, consuming the ModR/M byte as
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* appropriate for extended and escape opcodes. Determines the attributes and
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* getID - Determines the ID of an instruction, consuming the ModR/M byte as
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* appropriate for extended and escape opcodes. Determines the attributes and
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* context for the instruction before doing so.
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*
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* @param insn - The instruction whose ID is to be determined.
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@ -739,21 +739,21 @@ static BOOL is16BitEquivalent(const char* orig, const char* equiv) {
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static int getID(struct InternalInstruction* insn, const void *miiArg) {
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uint8_t attrMask;
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uint16_t instructionID;
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dbgprintf(insn, "getID()");
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attrMask = ATTR_NONE;
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if (insn->mode == MODE_64BIT)
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attrMask |= ATTR_64BIT;
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if (insn->vexSize) {
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attrMask |= ATTR_VEX;
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if (insn->vexSize == 3) {
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switch (ppFromVEX3of3(insn->vexPrefix[2])) {
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case VEX_PREFIX_66:
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attrMask |= ATTR_OPSIZE;
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attrMask |= ATTR_OPSIZE;
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break;
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case VEX_PREFIX_F3:
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attrMask |= ATTR_XS;
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@ -762,14 +762,14 @@ static int getID(struct InternalInstruction* insn, const void *miiArg) {
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attrMask |= ATTR_XD;
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break;
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}
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if (lFromVEX3of3(insn->vexPrefix[2]))
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attrMask |= ATTR_VEXL;
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}
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else if (insn->vexSize == 2) {
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switch (ppFromVEX2of2(insn->vexPrefix[1])) {
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case VEX_PREFIX_66:
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attrMask |= ATTR_OPSIZE;
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attrMask |= ATTR_OPSIZE;
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break;
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case VEX_PREFIX_F3:
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attrMask |= ATTR_XS;
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@ -778,7 +778,7 @@ static int getID(struct InternalInstruction* insn, const void *miiArg) {
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attrMask |= ATTR_XD;
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break;
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}
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if (lFromVEX2of2(insn->vexPrefix[1]))
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attrMask |= ATTR_VEXL;
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}
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@ -849,26 +849,26 @@ static int getID(struct InternalInstruction* insn, const void *miiArg) {
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* conservative, but in the specific case where OpSize is present but not
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* in the right place we check if there's a 16-bit operation.
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*/
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const struct InstructionSpecifier *spec;
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uint16_t instructionIDWithOpsize;
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const char *specName, *specWithOpSizeName;
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spec = specifierForUID(instructionID);
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if (getIDWithAttrMask(&instructionIDWithOpsize,
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insn,
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attrMask | ATTR_OPSIZE)) {
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/*
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/*
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* ModRM required with OpSize but not present; give up and return version
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* without OpSize set
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*/
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insn->instructionID = instructionID;
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insn->spec = spec;
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return 0;
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}
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specName = x86DisassemblerGetInstrName(instructionID, miiArg);
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specWithOpSizeName =
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x86DisassemblerGetInstrName(instructionIDWithOpsize, miiArg);
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@ -895,10 +895,10 @@ static int getID(struct InternalInstruction* insn, const void *miiArg) {
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const struct InstructionSpecifier *specWithNewOpcode;
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spec = specifierForUID(instructionID);
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/* Borrow opcode from one of the other XCHGar opcodes */
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insn->opcode = 0x91;
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if (getIDWithAttrMask(&instructionIDWithNewOpcode,
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insn,
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attrMask)) {
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@ -919,10 +919,10 @@ static int getID(struct InternalInstruction* insn, const void *miiArg) {
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return 0;
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}
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insn->instructionID = instructionID;
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insn->spec = specifierForUID(insn->instructionID);
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return 0;
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}
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@ -937,14 +937,14 @@ static int readSIB(struct InternalInstruction* insn) {
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SIBIndex sibIndexBase = 0;
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SIBBase sibBaseBase = 0;
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uint8_t index, base;
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dbgprintf(insn, "readSIB()");
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||||
if (insn->consumedSIB)
|
||||
return 0;
|
||||
|
||||
|
||||
insn->consumedSIB = TRUE;
|
||||
|
||||
|
||||
switch (insn->addressSize) {
|
||||
case 2:
|
||||
dbgprintf(insn, "SIB-based addressing doesn't work in 16-bit mode");
|
||||
@ -962,9 +962,9 @@ static int readSIB(struct InternalInstruction* insn) {
|
||||
|
||||
if (consumeByte(insn, &insn->sib))
|
||||
return -1;
|
||||
|
||||
|
||||
index = indexFromSIB(insn->sib) | (xFromREX(insn->rexPrefix) << 3);
|
||||
|
||||
|
||||
switch (index) {
|
||||
case 0x4:
|
||||
insn->sibIndex = SIB_INDEX_NONE;
|
||||
@ -976,7 +976,7 @@ static int readSIB(struct InternalInstruction* insn) {
|
||||
insn->sibIndex = SIB_INDEX_NONE;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
switch (scaleFromSIB(insn->sib)) {
|
||||
case 0:
|
||||
insn->sibScale = 1;
|
||||
@ -991,9 +991,9 @@ static int readSIB(struct InternalInstruction* insn) {
|
||||
insn->sibScale = 8;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
base = baseFromSIB(insn->sib) | (bFromREX(insn->rexPrefix) << 3);
|
||||
|
||||
|
||||
switch (base) {
|
||||
case 0x5:
|
||||
switch (modFromModRM(insn->modRM)) {
|
||||
@ -1003,12 +1003,12 @@ static int readSIB(struct InternalInstruction* insn) {
|
||||
break;
|
||||
case 0x1:
|
||||
insn->eaDisplacement = EA_DISP_8;
|
||||
insn->sibBase = (insn->addressSize == 4 ?
|
||||
insn->sibBase = (insn->addressSize == 4 ?
|
||||
SIB_BASE_EBP : SIB_BASE_RBP);
|
||||
break;
|
||||
case 0x2:
|
||||
insn->eaDisplacement = EA_DISP_32;
|
||||
insn->sibBase = (insn->addressSize == 4 ?
|
||||
insn->sibBase = (insn->addressSize == 4 ?
|
||||
SIB_BASE_EBP : SIB_BASE_RBP);
|
||||
break;
|
||||
case 0x3:
|
||||
@ -1020,7 +1020,7 @@ static int readSIB(struct InternalInstruction* insn) {
|
||||
insn->sibBase = (SIBBase)(sibBaseBase + base);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1028,22 +1028,22 @@ static int readSIB(struct InternalInstruction* insn) {
|
||||
* readDisplacement - Consumes the displacement of an instruction.
|
||||
*
|
||||
* @param insn - The instruction whose displacement is to be read.
|
||||
* @return - 0 if the displacement byte was successfully read; nonzero
|
||||
* @return - 0 if the displacement byte was successfully read; nonzero
|
||||
* otherwise.
|
||||
*/
|
||||
static int readDisplacement(struct InternalInstruction* insn) {
|
||||
static int readDisplacement(struct InternalInstruction* insn) {
|
||||
int8_t d8;
|
||||
int16_t d16;
|
||||
int32_t d32;
|
||||
|
||||
|
||||
dbgprintf(insn, "readDisplacement()");
|
||||
|
||||
|
||||
if (insn->consumedDisplacement)
|
||||
return 0;
|
||||
|
||||
|
||||
insn->consumedDisplacement = TRUE;
|
||||
insn->displacementOffset = insn->readerCursor - insn->startLocation;
|
||||
|
||||
|
||||
switch (insn->eaDisplacement) {
|
||||
case EA_DISP_NONE:
|
||||
insn->consumedDisplacement = FALSE;
|
||||
@ -1064,7 +1064,7 @@ static int readDisplacement(struct InternalInstruction* insn) {
|
||||
insn->displacement = d32;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
insn->consumedDisplacement = TRUE;
|
||||
return 0;
|
||||
}
|
||||
@ -1076,22 +1076,22 @@ static int readDisplacement(struct InternalInstruction* insn) {
|
||||
* @param insn - The instruction whose addressing information is to be read.
|
||||
* @return - 0 if the information was successfully read; nonzero otherwise.
|
||||
*/
|
||||
static int readModRM(struct InternalInstruction* insn) {
|
||||
static int readModRM(struct InternalInstruction* insn) {
|
||||
uint8_t mod, rm, reg;
|
||||
|
||||
|
||||
dbgprintf(insn, "readModRM()");
|
||||
|
||||
|
||||
if (insn->consumedModRM)
|
||||
return 0;
|
||||
|
||||
|
||||
if (consumeByte(insn, &insn->modRM))
|
||||
return -1;
|
||||
insn->consumedModRM = TRUE;
|
||||
|
||||
|
||||
mod = modFromModRM(insn->modRM);
|
||||
rm = rmFromModRM(insn->modRM);
|
||||
reg = regFromModRM(insn->modRM);
|
||||
|
||||
|
||||
/*
|
||||
* This goes by insn->registerSize to pick the correct register, which messes
|
||||
* up if we're using (say) XMM or 8-bit register operands. That gets fixed in
|
||||
@ -1111,16 +1111,16 @@ static int readModRM(struct InternalInstruction* insn) {
|
||||
insn->eaRegBase = EA_REG_RAX;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
reg |= rFromREX(insn->rexPrefix) << 3;
|
||||
rm |= bFromREX(insn->rexPrefix) << 3;
|
||||
|
||||
|
||||
insn->reg = (Reg)(insn->regBase + reg);
|
||||
|
||||
|
||||
switch (insn->addressSize) {
|
||||
case 2:
|
||||
insn->eaBaseBase = EA_BASE_BX_SI;
|
||||
|
||||
|
||||
switch (mod) {
|
||||
case 0x0:
|
||||
if (rm == 0x6) {
|
||||
@ -1155,14 +1155,14 @@ static int readModRM(struct InternalInstruction* insn) {
|
||||
case 4:
|
||||
case 8:
|
||||
insn->eaBaseBase = (insn->addressSize == 4 ? EA_BASE_EAX : EA_BASE_RAX);
|
||||
|
||||
|
||||
switch (mod) {
|
||||
case 0x0:
|
||||
insn->eaDisplacement = EA_DISP_NONE; /* readSIB may override this */
|
||||
switch (rm) {
|
||||
case 0x4:
|
||||
case 0xc: /* in case REXW.b is set */
|
||||
insn->eaBase = (insn->addressSize == 4 ?
|
||||
insn->eaBase = (insn->addressSize == 4 ?
|
||||
EA_BASE_sib : EA_BASE_sib64);
|
||||
readSIB(insn);
|
||||
if (readDisplacement(insn))
|
||||
@ -1204,7 +1204,7 @@ static int readModRM(struct InternalInstruction* insn) {
|
||||
}
|
||||
break;
|
||||
} /* switch (insn->addressSize) */
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1287,12 +1287,12 @@ GENERIC_FIXUP_FUNC(fixupRMValue, insn->eaRegBase, EA_REG)
|
||||
* @return - 0 if fixup was successful; -1 if the register returned was
|
||||
* invalid for its class.
|
||||
*/
|
||||
static int fixupReg(struct InternalInstruction *insn,
|
||||
static int fixupReg(struct InternalInstruction *insn,
|
||||
const struct OperandSpecifier *op) {
|
||||
uint8_t valid;
|
||||
|
||||
|
||||
dbgprintf(insn, "fixupReg()");
|
||||
|
||||
|
||||
switch ((OperandEncoding)op->encoding) {
|
||||
default:
|
||||
debug("Expected a REG or R/M encoding in fixupReg");
|
||||
@ -1324,12 +1324,12 @@ static int fixupReg(struct InternalInstruction *insn,
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* readOpcodeModifier - Reads an operand from the opcode field of an
|
||||
* readOpcodeModifier - Reads an operand from the opcode field of an
|
||||
* instruction. Handles AddRegFrm instructions.
|
||||
*
|
||||
* @param insn - The instruction whose opcode field is to be read.
|
||||
@ -1339,12 +1339,12 @@ static int fixupReg(struct InternalInstruction *insn,
|
||||
*/
|
||||
static int readOpcodeModifier(struct InternalInstruction* insn) {
|
||||
dbgprintf(insn, "readOpcodeModifier()");
|
||||
|
||||
|
||||
if (insn->consumedOpcodeModifier)
|
||||
return 0;
|
||||
|
||||
|
||||
insn->consumedOpcodeModifier = TRUE;
|
||||
|
||||
|
||||
switch (insn->spec->modifierType) {
|
||||
default:
|
||||
debug("Unknown modifier type.");
|
||||
@ -1358,11 +1358,11 @@ static int readOpcodeModifier(struct InternalInstruction* insn) {
|
||||
case MODIFIER_MODRM:
|
||||
insn->opcodeModifier = insn->modRM - insn->spec->modifierBase;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* readOpcodeRegister - Reads an operand from the opcode field of an
|
||||
* readOpcodeRegister - Reads an operand from the opcode field of an
|
||||
* instruction and interprets it appropriately given the operand width.
|
||||
* Handles AddRegFrm instructions.
|
||||
*
|
||||
@ -1377,39 +1377,39 @@ static int readOpcodeRegister(struct InternalInstruction* insn, uint8_t size) {
|
||||
|
||||
if (readOpcodeModifier(insn))
|
||||
return -1;
|
||||
|
||||
|
||||
if (size == 0)
|
||||
size = insn->registerSize;
|
||||
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
insn->opcodeRegister = (Reg)(MODRM_REG_AL + ((bFromREX(insn->rexPrefix) << 3)
|
||||
insn->opcodeRegister = (Reg)(MODRM_REG_AL + ((bFromREX(insn->rexPrefix) << 3)
|
||||
| insn->opcodeModifier));
|
||||
if (insn->rexPrefix &&
|
||||
if (insn->rexPrefix &&
|
||||
insn->opcodeRegister >= MODRM_REG_AL + 0x4 &&
|
||||
insn->opcodeRegister < MODRM_REG_AL + 0x8) {
|
||||
insn->opcodeRegister = (Reg)(MODRM_REG_SPL
|
||||
+ (insn->opcodeRegister - MODRM_REG_AL - 4));
|
||||
}
|
||||
|
||||
|
||||
break;
|
||||
case 2:
|
||||
insn->opcodeRegister = (Reg)(MODRM_REG_AX
|
||||
+ ((bFromREX(insn->rexPrefix) << 3)
|
||||
+ ((bFromREX(insn->rexPrefix) << 3)
|
||||
| insn->opcodeModifier));
|
||||
break;
|
||||
case 4:
|
||||
insn->opcodeRegister = (Reg)(MODRM_REG_EAX
|
||||
+ ((bFromREX(insn->rexPrefix) << 3)
|
||||
+ ((bFromREX(insn->rexPrefix) << 3)
|
||||
| insn->opcodeModifier));
|
||||
break;
|
||||
case 8:
|
||||
insn->opcodeRegister = (Reg)(MODRM_REG_RAX
|
||||
+ ((bFromREX(insn->rexPrefix) << 3)
|
||||
insn->opcodeRegister = (Reg)(MODRM_REG_RAX
|
||||
+ ((bFromREX(insn->rexPrefix) << 3)
|
||||
| insn->opcodeModifier));
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1427,20 +1427,20 @@ static int readImmediate(struct InternalInstruction* insn, uint8_t size) {
|
||||
uint16_t imm16;
|
||||
uint32_t imm32;
|
||||
uint64_t imm64;
|
||||
|
||||
|
||||
dbgprintf(insn, "readImmediate()");
|
||||
|
||||
|
||||
if (insn->numImmediatesConsumed == 2) {
|
||||
debug("Already consumed two immediates");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (size == 0)
|
||||
size = insn->immediateSize;
|
||||
else
|
||||
insn->immediateSize = size;
|
||||
insn->immediateOffset = insn->readerCursor - insn->startLocation;
|
||||
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
if (consumeByte(insn, &imm8))
|
||||
@ -1463,9 +1463,9 @@ static int readImmediate(struct InternalInstruction* insn, uint8_t size) {
|
||||
insn->immediates[insn->numImmediatesConsumed] = imm64;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
insn->numImmediatesConsumed++;
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1478,7 +1478,7 @@ static int readImmediate(struct InternalInstruction* insn, uint8_t size) {
|
||||
*/
|
||||
static int readVVVV(struct InternalInstruction* insn) {
|
||||
dbgprintf(insn, "readVVVV()");
|
||||
|
||||
|
||||
if (insn->vexSize == 3)
|
||||
insn->vvvv = vvvvFromVEX3of3(insn->vexPrefix[2]);
|
||||
else if (insn->vexSize == 2)
|
||||
@ -1503,14 +1503,14 @@ static int readOperands(struct InternalInstruction* insn) {
|
||||
int index;
|
||||
int hasVVVV, needVVVV;
|
||||
int sawRegImm = 0;
|
||||
|
||||
|
||||
dbgprintf(insn, "readOperands()");
|
||||
|
||||
/* If non-zero vvvv specified, need to make sure one of the operands
|
||||
uses it. */
|
||||
hasVVVV = !readVVVV(insn);
|
||||
needVVVV = hasVVVV && (insn->vvvv != 0);
|
||||
|
||||
|
||||
for (index = 0; index < X86_MAX_OPERANDS; ++index) {
|
||||
switch (x86OperandSets[insn->spec->operands][index].encoding) {
|
||||
case ENCODING_NONE:
|
||||
@ -1612,7 +1612,7 @@ static int readOperands(struct InternalInstruction* insn) {
|
||||
|
||||
/* If we didn't find ENCODING_VVVV operand, but non-zero vvvv present, fail */
|
||||
if (needVVVV) return -1;
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1620,7 +1620,7 @@ static int readOperands(struct InternalInstruction* insn) {
|
||||
* decodeInstruction - Reads and interprets a full instruction provided by the
|
||||
* user.
|
||||
*
|
||||
* @param insn - A pointer to the instruction to be populated. Must be
|
||||
* @param insn - A pointer to the instruction to be populated. Must be
|
||||
* pre-allocated.
|
||||
* @param reader - The function to be used to read the instruction's bytes.
|
||||
* @param readerArg - A generic argument to be passed to the reader to store
|
||||
@ -1645,7 +1645,7 @@ int decodeInstruction(struct InternalInstruction* insn,
|
||||
uint64_t startLoc,
|
||||
DisassemblerMode mode) {
|
||||
memset(insn, 0, sizeof(struct InternalInstruction));
|
||||
|
||||
|
||||
insn->reader = reader;
|
||||
insn->readerArg = readerArg;
|
||||
insn->dlog = logger;
|
||||
@ -1654,7 +1654,7 @@ int decodeInstruction(struct InternalInstruction* insn,
|
||||
insn->readerCursor = startLoc;
|
||||
insn->mode = mode;
|
||||
insn->numImmediatesConsumed = 0;
|
||||
|
||||
|
||||
if (readPrefixes(insn) ||
|
||||
readOpcode(insn) ||
|
||||
getID(insn, miiArg) ||
|
||||
@ -1663,14 +1663,14 @@ int decodeInstruction(struct InternalInstruction* insn,
|
||||
return -1;
|
||||
|
||||
insn->operands = &x86OperandSets[insn->spec->operands][0];
|
||||
|
||||
|
||||
insn->length = insn->readerCursor - insn->startLocation;
|
||||
|
||||
|
||||
dbgprintf(insn, "Read from 0x%llx to 0x%llx: length %zu",
|
||||
startLoc, insn->readerCursor, insn->length);
|
||||
|
||||
|
||||
if (insn->length > 15)
|
||||
dbgprintf(insn, "Instruction exceeds 15-byte limit");
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user