RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2025-02-28 08:59:28 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

While I'm here, remove the "_alt" hacks to a series of INSERT_SUBREG and

Browse Source 
also add the AVX versions of the 128-bit patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137685 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2011-08-15 23:36:51 +00:00
parent 1deddbbd56
commit 8400bfe9fa
1 changed files with 25 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

40
lib/Target/X86/X86InstrSSE.td
View File

@ -1480,21 +1480,18 @@ defm MOVMSKPS : sse12_extr_sign_mask<VR128, int_x86_sse_movmsk_ps, "movmskps",
defm MOVMSKPD : sse12_extr_sign_mask<VR128, int_x86_sse2_movmsk_pd, "movmskpd",
SSEPackedDouble>, TB, OpSize;
// X86fgetsign
def MOVMSKPDrr32_alt : PI<0x50, MRMSrcReg, (outs GR32:$dst), (ins FR64:$src),
"movmskpd\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (X86fgetsign FR64:$src))], SSEPackedDouble>, TB,
OpSize;
def MOVMSKPDrr64_alt : PI<0x50, MRMSrcReg, (outs GR64:$dst), (ins FR64:$src),
"movmskpd\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (X86fgetsign FR64:$src))], SSEPackedDouble>, TB,
OpSize;
def MOVMSKPSrr32_alt : PI<0x50, MRMSrcReg, (outs GR32:$dst), (ins FR32:$src),
"movmskps\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (X86fgetsign FR32:$src))], SSEPackedSingle>, TB;
def MOVMSKPSrr64_alt : PI<0x50, MRMSrcReg, (outs GR64:$dst), (ins FR32:$src),
"movmskps\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (X86fgetsign FR32:$src))], SSEPackedSingle>, TB;
def : Pat<(i32 (X86fgetsign FR32:$src)),
(MOVMSKPSrr32 (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), FR32:$src,
sub_ss))>, Requires<[HasSSE1]>;
def : Pat<(i64 (X86fgetsign FR32:$src)),
(MOVMSKPSrr64 (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), FR32:$src,
sub_ss))>, Requires<[HasSSE1]>;
def : Pat<(i32 (X86fgetsign FR64:$src)),
(MOVMSKPDrr32 (INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), FR64:$src,
sub_sd))>, Requires<[HasSSE2]>;
def : Pat<(i64 (X86fgetsign FR64:$src)),
(MOVMSKPDrr64 (INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), FR64:$src,
sub_sd))>, Requires<[HasSSE2]>;
let Predicates = [HasAVX] in {
defm VMOVMSKPS : sse12_extr_sign_mask<VR128, int_x86_sse_movmsk_ps,
@ -1508,6 +1505,19 @@ let Predicates = [HasAVX] in {
"movmskpd", SSEPackedDouble>, TB, OpSize,
VEX;
def : Pat<(i32 (X86fgetsign FR32:$src)),
(VMOVMSKPSrr32 (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), FR32:$src,
sub_ss))>;
def : Pat<(i64 (X86fgetsign FR32:$src)),
(VMOVMSKPSrr64 (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), FR32:$src,
sub_ss))>;
def : Pat<(i32 (X86fgetsign FR64:$src)),
(VMOVMSKPDrr32 (INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), FR64:$src,
sub_sd))>;
def : Pat<(i64 (X86fgetsign FR64:$src)),
(VMOVMSKPDrr64 (INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), FR64:$src,
sub_sd))>;
// Assembler Only
def VMOVMSKPSr64r : PI<0x50, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src),
"movmskps\t{$src, $dst|$dst, $src}", [], SSEPackedSingle>, VEX;