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Use setPreservesAll and setPreservesCFG in CodeGen passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77754 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -169,6 +169,7 @@ void AsmPrinter::SwitchToSection(const MCSection *NS) {
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}
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void AsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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AU.addRequired<GCModuleInfo>();
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}
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@ -67,6 +67,7 @@ char LiveIntervals::ID = 0;
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static RegisterPass<LiveIntervals> X("liveintervals", "Live Interval Analysis");
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void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequired<AliasAnalysis>();
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AU.addPreserved<AliasAnalysis>();
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AU.addPreserved<LiveVariables>();
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@ -39,6 +39,7 @@ namespace {
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addPreservedID(MachineLoopInfoID);
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AU.addPreservedID(MachineDominatorsID);
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MachineFunctionPass::getAnalysisUsage(AU);
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@ -306,6 +306,7 @@ struct DebugLabelFolder : public MachineFunctionPass {
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DebugLabelFolder() : MachineFunctionPass(&ID) {}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addPreservedID(MachineLoopInfoID);
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AU.addPreservedID(MachineDominatorsID);
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MachineFunctionPass::getAnalysisUsage(AU);
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@ -40,6 +40,7 @@ namespace {
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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@ -41,11 +41,12 @@ X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
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const PassInfo *const llvm::PHIEliminationID = &X;
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void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreserved<LiveVariables>();
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AU.addPreservedID(MachineLoopInfoID);
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AU.addPreservedID(MachineDominatorsID);
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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AU.setPreservesCFG();
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AU.addPreserved<LiveVariables>();
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AU.addPreservedID(MachineLoopInfoID);
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AU.addPreservedID(MachineDominatorsID);
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &Fn) {
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MRI = &Fn.getRegInfo();
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@ -59,6 +59,7 @@ namespace {
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PostRAScheduler() : MachineFunctionPass(&ID) {}
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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AU.addRequired<MachineLoopInfo>();
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@ -92,6 +92,7 @@ namespace {
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequired<LiveIntervals>();
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AU.addPreserved<LiveIntervals>();
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AU.addRequired<LiveStacks>();
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@ -111,6 +111,7 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) {
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#if 0
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void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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if (ShrinkWrapping || ShrinkWrapFunc != "") {
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AU.addRequired<MachineLoopInfo>();
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AU.addRequired<MachineDominatorTree>();
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@ -145,6 +145,7 @@ namespace {
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequired<LiveIntervals>();
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if (StrongPHIElim)
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AU.addRequiredID(StrongPHIEliminationID);
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@ -153,6 +153,7 @@ namespace {
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequiredID(PHIEliminationID);
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AU.addRequiredID(TwoAddressInstructionPassID);
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MachineFunctionPass::getAnalysisUsage(AU);
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@ -77,15 +77,16 @@ namespace {
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}
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//! PBQP analysis usage.
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virtual void getAnalysisUsage(AnalysisUsage &au) const {
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au.addRequired<LiveIntervals>();
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au.addRequiredTransitive<RegisterCoalescer>();
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au.addRequired<LiveStacks>();
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au.addPreserved<LiveStacks>();
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au.addRequired<MachineLoopInfo>();
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au.addPreserved<MachineLoopInfo>();
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au.addRequired<VirtRegMap>();
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MachineFunctionPass::getAnalysisUsage(au);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequired<LiveIntervals>();
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AU.addRequiredTransitive<RegisterCoalescer>();
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AU.addRequired<LiveStacks>();
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AU.addPreserved<LiveStacks>();
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AU.addRequired<MachineLoopInfo>();
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AU.addPreserved<MachineLoopInfo>();
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AU.addRequired<VirtRegMap>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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//! Perform register allocation
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@ -70,6 +70,7 @@ namespace {
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bool runOnMachineFunction(MachineFunction &Fn);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequiredID(PHIEliminationID); // Eliminate PHI nodes
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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@ -76,6 +76,7 @@ static RegisterAnalysisGroup<RegisterCoalescer, true/*The Default*/> V(X);
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const PassInfo *const llvm::SimpleRegisterCoalescingID = &X;
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void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequired<LiveIntervals>();
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AU.addPreserved<LiveIntervals>();
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AU.addRequired<MachineLoopInfo>();
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@ -97,6 +97,7 @@ namespace {
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MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequired<LiveStacks>();
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AU.addRequired<VirtRegMap>();
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AU.addPreserved<VirtRegMap>();
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@ -71,6 +71,7 @@ namespace {
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bool runOnMachineFunction(MachineFunction &Fn);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addRequired<MachineDominatorTree>();
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AU.addRequired<LiveIntervals>();
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@ -113,6 +113,7 @@ namespace {
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TwoAddressInstructionPass() : MachineFunctionPass(&ID) {}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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AU.addPreserved<LiveVariables>();
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AU.addPreservedID(MachineLoopInfoID);
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AU.addPreservedID(MachineDominatorsID);
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