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[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196755 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2304,7 +2304,7 @@ static SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) {
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}
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static SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG,
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bool is64Bit) {
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const SparcSubtarget *Subtarget) {
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SDValue Chain = Op.getOperand(0); // Legalize the chain.
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SDValue Size = Op.getOperand(1); // Legalize the size.
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EVT VT = Size->getValueType(0);
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@ -2317,7 +2317,9 @@ static SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG,
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// The resultant pointer is actually 16 words from the bottom of the stack,
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// to provide a register spill area.
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unsigned regSpillArea = (is64Bit) ? 128 : 96;
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unsigned regSpillArea = Subtarget->is64Bit() ? 128 : 96;
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regSpillArea += Subtarget->getStackPointerBias();
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SDValue NewVal = DAG.getNode(ISD::ADD, dl, VT, NewSP,
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DAG.getConstant(regSpillArea, VT));
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SDValue Ops[2] = { NewVal, Chain };
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@ -2644,7 +2646,7 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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case ISD::VASTART: return LowerVASTART(Op, DAG, *this);
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case ISD::VAARG: return LowerVAARG(Op, DAG);
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case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG,
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is64Bit);
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Subtarget);
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case ISD::LOAD: return LowerF128Load(Op, DAG);
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case ISD::STORE: return LowerF128Store(Op, DAG);
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@ -10,7 +10,7 @@
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; SPARC64-LABEL: variable_alloca_with_adj_call_stack
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; SPARC64: save %sp, -128, %sp
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; SPARC64: add {{.+}}, 128, %o0
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; SPARC64: add {{.+}}, 2175, %o0
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; SPARC64: add %sp, -80, %sp
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; SPARC64: call foo
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; SPARC64: add %sp, 80, %sp
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