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Chain is on second operand.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34759 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey 2007-02-28 20:43:58 +00:00
parent 581b0d453a
commit 8782d481a3
1 changed files with 23 additions and 4 deletions
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27
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -676,16 +676,13 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
else
Result = DAG.getConstant(0, TLI.getPointerTy());
break;
case ISD::EHSELECTION:
case ISD::EXCEPTIONADDR: {
Tmp1 = LegalizeOp(Node->getOperand(0));
MVT::ValueType VT = Node->getValueType(0);
switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
default: assert(0 && "This action is not supported yet!");
case TargetLowering::Expand: {
unsigned Reg = Node->getOpcode() == ISD::EXCEPTIONADDR ?
TLI.getExceptionAddressRegister() :
TLI.getExceptionSelectorRegister();
unsigned Reg = TLI.getExceptionAddressRegister();
Result = DAG.getCopyFromReg(Tmp1, Reg, VT).getValue(Op.ResNo);
}
break;
@ -700,6 +697,28 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
}
}
break;
case ISD::EHSELECTION: {
Tmp1 = LegalizeOp(Node->getOperand(0));
Tmp2 = LegalizeOp(Node->getOperand(1));
MVT::ValueType VT = Node->getValueType(0);
switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
default: assert(0 && "This action is not supported yet!");
case TargetLowering::Expand: {
unsigned Reg = TLI.getExceptionSelectorRegister();
Result = DAG.getCopyFromReg(Tmp2, Reg, VT).getValue(Op.ResNo);
}
break;
case TargetLowering::Custom:
Result = TLI.LowerOperation(Op, DAG);
if (Result.Val) break;
// Fall Thru
case TargetLowering::Legal:
Result = DAG.getNode(ISD::MERGE_VALUES, VT, DAG.getConstant(0, VT), Tmp2).
getValue(Op.ResNo);
break;
}
}
break;
case ISD::AssertSext:
case ISD::AssertZext:
Tmp1 = LegalizeOp(Node->getOperand(0));