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[mips] Define "bal" as a pseudo instruction. Also, fix bug in the InstAlias that

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turns "bal" into "bgezal".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187440 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2013-07-30 20:24:24 +00:00
parent ed0a016e80
commit 8838da6587
2 changed files with 9 additions and 5 deletions
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3
lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
View File

@ -241,6 +241,9 @@ bool MipsInstPrinter::printAlias(const MCInst &MI, raw_ostream &OS) {
case Mips::BNE64:
// bne $r0, $zero, $L2 => bnez $r0, $L2
return isReg<Mips::ZERO_64>(MI, 1) && printAlias("bnez", MI, 0, 2, OS);
case Mips::BGEZAL:
// bgezal $zero, $L1 => bal $L1
return isReg<Mips::ZERO>(MI, 0) && printAlias("bal", MI, 1, OS);
case Mips::BC1T:
// bc1t $fcc0, $L1 => bc1t $L1
return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1t", MI, 1, OS);

11
lib/Target/Mips/MipsInstrInfo.td
View File

@ -635,14 +635,16 @@ let isCall=1, hasDelaySlot=1, Defs = [RA] in {
}
class BAL_FT :
InstSE<(outs), (ins brtarget:$offset), "bal\t$offset", [], IIBranch, FrmI> {
class BAL_BR_Pseudo<Instruction RealInst> :
PseudoSE<(outs), (ins brtarget:$offset), [], IIBranch>,
PseudoInstExpansion<(RealInst ZERO, brtarget:$offset)> {
let isBranch = 1;
let isTerminator = 1;
let isBarrier = 1;
let hasDelaySlot = 1;
let Defs = [RA];
}
// Syscall
class SYS_FT<string opstr> :
InstSE<(outs), (ins uimm20:$code_),
@ -994,13 +996,12 @@ def BGTZ : CBranchZero<"bgtz", setgt, CPURegsOpnd>, BGEZ_FM<7, 0>;
def BLEZ : CBranchZero<"blez", setle, CPURegsOpnd>, BGEZ_FM<6, 0>;
def BLTZ : CBranchZero<"bltz", setlt, CPURegsOpnd>, BGEZ_FM<1, 0>;
def BAL_BR: BAL_FT, BAL_FM;
def JAL : JumpLink<"jal">, FJ<3>;
def JALR : JumpLinkReg<"jalr", CPURegs>, JALR_FM;
def JALRPseudo : JumpLinkRegPseudo<CPURegs, JALR, RA>;
def BGEZAL : BGEZAL_FT<"bgezal", CPURegsOpnd>, BGEZAL_FM<0x11>;
def BLTZAL : BGEZAL_FT<"bltzal", CPURegsOpnd>, BGEZAL_FM<0x10>;
def BAL_BR : BAL_BR_Pseudo<BGEZAL>;
def TAILCALL : JumpFJ<calltarget, "j", MipsTailCall, imm>, FJ<2>, IsTailCall;
def TAILCALL_R : JumpFR<CPURegs, MipsTailCall>, MTLO_FM<8>, IsTailCall;
@ -1104,7 +1105,7 @@ def MTC2_3OP : MFC3OP<(outs CPURegsOpnd:$rd, uimm16:$sel),
def : InstAlias<"move $dst, $src",
(ADDu CPURegsOpnd:$dst, CPURegsOpnd:$src,ZERO), 1>,
Requires<[NotMips64]>;
def : InstAlias<"bal $offset", (BGEZAL RA, brtarget:$offset), 1>;
def : InstAlias<"bal $offset", (BGEZAL ZERO, brtarget:$offset), 1>;
def : InstAlias<"addu $rs, $rt, $imm",
(ADDiu CPURegsOpnd:$rs, CPURegsOpnd:$rt, simm16:$imm), 0>;
def : InstAlias<"add $rs, $rt, $imm",