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[mips] Absolute value macro expansion

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Author: obucina
Reviewers: dsanders
Differential Revision: http://reviews.llvm.org/D16323


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259202 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Zoran Jovanovic 2016-01-29 16:18:34 +00:00
parent 72374d2610
commit 8922077b90
3 changed files with 37 additions and 0 deletions
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22
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
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@ -233,6 +233,9 @@ class MipsAsmParser : public MCTargetAsmParser {
bool expandDRotationImm(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
bool expandAbs(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
void createNop(bool hasShortDelaySlot, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
@ -2087,6 +2090,9 @@ MipsAsmParser::tryExpandInstruction(MCInst &Inst, SMLoc IDLoc,
case Mips::DRORImm:
return expandDRotationImm(Inst, IDLoc, Instructions) ? MER_Fail
: MER_Success;
case Mips::ABSMacro:
return expandAbs(Inst, IDLoc, Instructions) ? MER_Fail
: MER_Success;
}
}
@ -3531,6 +3537,22 @@ bool MipsAsmParser::expandDRotationImm(MCInst &Inst, SMLoc IDLoc,
return true;
}
bool MipsAsmParser::expandAbs(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions) {
unsigned FirstRegOp = Inst.getOperand(0).getReg();
unsigned SecondRegOp = Inst.getOperand(1).getReg();
emitRI(Mips::BGEZ, SecondRegOp, 8, IDLoc, Instructions);
if (FirstRegOp != SecondRegOp)
emitRRR(Mips::ADDu, FirstRegOp, SecondRegOp, Mips::ZERO, IDLoc, Instructions);
else
createNop(false, IDLoc, Instructions);
emitRRR(Mips::SUB, FirstRegOp, Mips::ZERO, SecondRegOp, IDLoc, Instructions);
return false;
}
void MipsAsmParser::createNop(bool hasShortDelaySlot, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions) {
if (hasShortDelaySlot)

3
lib/Target/Mips/MipsInstrInfo.td
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@ -1808,6 +1808,9 @@ def : MipsInstAlias<"dror $rd, $rs",
def : MipsInstAlias<"dror $rd, $imm",
(DRORImm GPR32Opnd:$rd, GPR32Opnd:$rd, simm16:$imm), 0>, ISA_MIPS64;
def ABSMacro : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), (ins GPR32Opnd:$rs),
"abs\t$rd, $rs">;
//===----------------------------------------------------------------------===//
// Instruction aliases
//===----------------------------------------------------------------------===//

12
test/MC/Mips/macro-abs.s Normal file
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@ -0,0 +1,12 @@
# RUN: llvm-mc -triple mips-unknown-linux -show-encoding %s | FileCheck %s
.text
# CHECK: .text
abs $4, $4
# CHECK: bgez $4, 8 # encoding: [0x04,0x81,0x00,0x02]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: neg $4, $4 # encoding: [0x00,0x04,0x20,0x22]
abs $4, $5
# CHECK: bgez $5, 8 # encoding: [0x04,0xa1,0x00,0x02]
# CHECK: move $4, $5 # encoding: [0x00,0xa0,0x20,0x21]
# CHECK: neg $4, $5 # encoding: [0x00,0x05,0x20,0x22]