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Clean up a comment.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107882 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-07-08 16:54:45 +00:00
parent dba3e15625
commit 8af4c54af1
1 changed files with 5 additions and 5 deletions
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10
lib/Target/ARM/ARMRegisterInfo.td
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@ -153,11 +153,11 @@ def Q15 : ARMReg<15, "q15", [D30, D31]>;
// Pseudo 256-bit registers to represent pairs of Q registers. These should
// never be present in the emitted code.
// These are used for NEON load / store instructions, e.g. vld4, vst3.
// NOTE: It's possible to define more QQ registers since technical the
// starting D register number doesn't have to be multiple of 4. e.g.
// D1, D2, D3, D4 would be a legal quad. But that would make the sub-register
// stuffs very messy.
// These are used for NEON load / store instructions, e.g., vld4, vst3.
// NOTE: It's possible to define more QQ registers since technically the
// starting D register number doesn't have to be multiple of 4, e.g.,
// D1, D2, D3, D4 would be a legal quad, but that would make the subregister
// stuff very messy.
let SubRegIndices = [qsub_0, qsub_1] in {
let CompositeIndices = [(dsub_2 qsub_1, dsub_0), (dsub_3 qsub_1, dsub_1),
(ssub_4 qsub_1, ssub_0), (ssub_5 qsub_1, ssub_1),