mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-14 07:31:47 +00:00
Update some internal naming conventions to modern style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155142 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -419,13 +419,13 @@ struct MatchableInfo {
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AsmString(Alias->AsmString) {
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}
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void Initialize(const AsmMatcherInfo &Info,
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void initialize(const AsmMatcherInfo &Info,
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SmallPtrSet<Record*, 16> &SingletonRegisters,
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int AsmVariantNo, std::string &RegisterPrefix);
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/// Validate - Return true if this matchable is a valid thing to match against
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/// validate - Return true if this matchable is a valid thing to match against
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/// and perform a bunch of validity checking.
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bool Validate(StringRef CommentDelimiter, bool Hack) const;
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bool validate(StringRef CommentDelimiter, bool Hack) const;
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/// extractSingletonRegisterForAsmOperand - Extract singleton register,
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/// if present, from specified token.
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@ -433,9 +433,9 @@ struct MatchableInfo {
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extractSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info,
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std::string &RegisterPrefix);
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/// FindAsmOperand - Find the AsmOperand with the specified name and
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/// findAsmOperand - Find the AsmOperand with the specified name and
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/// suboperand index.
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int FindAsmOperand(StringRef N, int SubOpIdx) const {
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int findAsmOperand(StringRef N, int SubOpIdx) const {
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for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
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if (N == AsmOperands[i].SrcOpName &&
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SubOpIdx == AsmOperands[i].SubOpIdx)
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@ -443,17 +443,17 @@ struct MatchableInfo {
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return -1;
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}
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/// FindAsmOperandNamed - Find the first AsmOperand with the specified name.
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/// findAsmOperandNamed - Find the first AsmOperand with the specified name.
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/// This does not check the suboperand index.
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int FindAsmOperandNamed(StringRef N) const {
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int findAsmOperandNamed(StringRef N) const {
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for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
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if (N == AsmOperands[i].SrcOpName)
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return i;
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return -1;
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}
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void BuildInstructionResultOperands();
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void BuildAliasResultOperands();
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void buildInstructionResultOperands();
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void buildAliasResultOperands();
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/// operator< - Compare two matchables.
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bool operator<(const MatchableInfo &RHS) const {
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@ -465,7 +465,7 @@ struct MatchableInfo {
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return AsmOperands.size() < RHS.AsmOperands.size();
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// Compare lexicographically by operand. The matcher validates that other
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// orderings wouldn't be ambiguous using \see CouldMatchAmbiguouslyWith().
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// orderings wouldn't be ambiguous using \see couldMatchAmbiguouslyWith().
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for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
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if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
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return true;
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@ -476,10 +476,10 @@ struct MatchableInfo {
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return false;
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}
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/// CouldMatchAmbiguouslyWith - Check whether this matchable could
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/// couldMatchAmbiguouslyWith - Check whether this matchable could
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/// ambiguously match the same set of operands as \arg RHS (without being a
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/// strictly superior match).
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bool CouldMatchAmbiguouslyWith(const MatchableInfo &RHS) {
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bool couldMatchAmbiguouslyWith(const MatchableInfo &RHS) {
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// The primary comparator is the instruction mnemonic.
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if (Mnemonic != RHS.Mnemonic)
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return false;
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@ -518,7 +518,7 @@ struct MatchableInfo {
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void dump();
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private:
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void TokenizeAsmString(const AsmMatcherInfo &Info);
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void tokenizeAsmString(const AsmMatcherInfo &Info);
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};
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/// SubtargetFeatureInfo - Helper class for storing information on a subtarget
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@ -543,7 +543,7 @@ struct OperandMatchEntry {
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MatchableInfo* MI;
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ClassInfo *CI;
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static OperandMatchEntry Create(MatchableInfo* mi, ClassInfo *ci,
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static OperandMatchEntry create(MatchableInfo* mi, ClassInfo *ci,
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unsigned opMask) {
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OperandMatchEntry X;
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X.OperandMask = opMask;
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@ -599,17 +599,17 @@ private:
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int SubOpIdx);
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ClassInfo *getOperandClass(Record *Rec, int SubOpIdx);
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/// BuildRegisterClasses - Build the ClassInfo* instances for register
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/// buildRegisterClasses - Build the ClassInfo* instances for register
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/// classes.
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void BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters);
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void buildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters);
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/// BuildOperandClasses - Build the ClassInfo* instances for user defined
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/// buildOperandClasses - Build the ClassInfo* instances for user defined
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/// operand classes.
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void BuildOperandClasses();
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void buildOperandClasses();
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void BuildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
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void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
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unsigned AsmOpIdx);
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void BuildAliasOperandReference(MatchableInfo *II, StringRef OpName,
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void buildAliasOperandReference(MatchableInfo *II, StringRef OpName,
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MatchableInfo::AsmOperand &Op);
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public:
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@ -617,12 +617,12 @@ public:
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CodeGenTarget &Target,
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RecordKeeper &Records);
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/// BuildInfo - Construct the various tables used during matching.
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void BuildInfo();
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/// buildInfo - Construct the various tables used during matching.
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void buildInfo();
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/// BuildOperandMatchInfo - Build the necessary information to handle user
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/// buildOperandMatchInfo - Build the necessary information to handle user
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/// defined operand parsing methods.
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void BuildOperandMatchInfo();
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void buildOperandMatchInfo();
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/// getSubtargetFeature - Lookup or create the subtarget feature info for the
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/// given operand.
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@ -650,14 +650,14 @@ void MatchableInfo::dump() {
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}
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}
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void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
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void MatchableInfo::initialize(const AsmMatcherInfo &Info,
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SmallPtrSet<Record*, 16> &SingletonRegisters,
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int AsmVariantNo, std::string &RegisterPrefix) {
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AsmVariantID = AsmVariantNo;
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AsmString =
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CodeGenInstruction::FlattenAsmStringVariants(AsmString, AsmVariantNo);
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TokenizeAsmString(Info);
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tokenizeAsmString(Info);
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// Compute the require features.
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std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
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@ -674,8 +674,8 @@ void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
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}
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}
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/// TokenizeAsmString - Tokenize a simplified assembly string.
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void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
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/// tokenizeAsmString - Tokenize a simplified assembly string.
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void MatchableInfo::tokenizeAsmString(const AsmMatcherInfo &Info) {
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StringRef String = AsmString;
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unsigned Prev = 0;
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bool InTok = true;
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@ -758,7 +758,7 @@ void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
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AsmOperands.erase(AsmOperands.begin());
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}
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bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
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bool MatchableInfo::validate(StringRef CommentDelimiter, bool Hack) const {
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// Reject matchables with no .s string.
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if (AsmString.empty())
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throw TGError(TheDef->getLoc(), "instruction with empty asm string");
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@ -929,7 +929,7 @@ AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
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}
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void AsmMatcherInfo::
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BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
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buildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
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const std::vector<CodeGenRegister*> &Registers =
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Target.getRegBank().getRegisters();
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ArrayRef<CodeGenRegisterClass*> RegClassList =
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@ -1054,7 +1054,7 @@ BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
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}
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}
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void AsmMatcherInfo::BuildOperandClasses() {
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void AsmMatcherInfo::buildOperandClasses() {
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std::vector<Record*> AsmOperands =
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Records.getAllDerivedDefinitions("AsmOperandClass");
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@ -1123,9 +1123,9 @@ AsmMatcherInfo::AsmMatcherInfo(Record *asmParser,
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: Records(records), AsmParser(asmParser), Target(target) {
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}
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/// BuildOperandMatchInfo - Build the necessary information to handle user
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/// buildOperandMatchInfo - Build the necessary information to handle user
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/// defined operand parsing methods.
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void AsmMatcherInfo::BuildOperandMatchInfo() {
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void AsmMatcherInfo::buildOperandMatchInfo() {
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/// Map containing a mask with all operands indices that can be found for
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/// that class inside a instruction.
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@ -1152,12 +1152,12 @@ void AsmMatcherInfo::BuildOperandMatchInfo() {
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iie = OpClassMask.end(); iit != iie; ++iit) {
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unsigned OpMask = iit->second;
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ClassInfo *CI = iit->first;
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OperandMatchInfo.push_back(OperandMatchEntry::Create(&II, CI, OpMask));
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OperandMatchInfo.push_back(OperandMatchEntry::create(&II, CI, OpMask));
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}
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}
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}
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void AsmMatcherInfo::BuildInfo() {
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void AsmMatcherInfo::buildInfo() {
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// Build information about all of the AssemblerPredicates.
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std::vector<Record*> AllPredicates =
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Records.getAllDerivedDefinitions("Predicate");
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@ -1222,11 +1222,11 @@ void AsmMatcherInfo::BuildInfo() {
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OwningPtr<MatchableInfo> II(new MatchableInfo(CGI));
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II->Initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
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II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
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// Ignore instructions which shouldn't be matched and diagnose invalid
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// instruction definitions with an error.
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if (!II->Validate(CommentDelimiter, true))
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if (!II->validate(CommentDelimiter, true))
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continue;
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// Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
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@ -1255,20 +1255,20 @@ void AsmMatcherInfo::BuildInfo() {
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OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
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II->Initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
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II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
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// Validate the alias definitions.
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II->Validate(CommentDelimiter, false);
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II->validate(CommentDelimiter, false);
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Matchables.push_back(II.take());
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}
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}
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// Build info for the register classes.
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BuildRegisterClasses(SingletonRegisters);
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buildRegisterClasses(SingletonRegisters);
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// Build info for the user defined assembly operand classes.
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BuildOperandClasses();
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buildOperandClasses();
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// Build the information about matchables, now that we have fully formed
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// classes.
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@ -1277,7 +1277,7 @@ void AsmMatcherInfo::BuildInfo() {
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MatchableInfo *II = *it;
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// Parse the tokens after the mnemonic.
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// Note: BuildInstructionOperandReference may insert new AsmOperands, so
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// Note: buildInstructionOperandReference may insert new AsmOperands, so
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// don't precompute the loop bound.
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for (unsigned i = 0; i != II->AsmOperands.size(); ++i) {
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MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
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@ -1310,15 +1310,15 @@ void AsmMatcherInfo::BuildInfo() {
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OperandName = Token.substr(1);
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if (II->DefRec.is<const CodeGenInstruction*>())
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BuildInstructionOperandReference(II, OperandName, i);
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buildInstructionOperandReference(II, OperandName, i);
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else
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BuildAliasOperandReference(II, OperandName, Op);
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buildAliasOperandReference(II, OperandName, Op);
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}
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if (II->DefRec.is<const CodeGenInstruction*>())
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II->BuildInstructionResultOperands();
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II->buildInstructionResultOperands();
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else
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II->BuildAliasResultOperands();
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II->buildAliasResultOperands();
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}
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// Process token alias definitions and set up the associated superclass
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@ -1339,10 +1339,10 @@ void AsmMatcherInfo::BuildInfo() {
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std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
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}
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/// BuildInstructionOperandReference - The specified operand is a reference to a
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/// buildInstructionOperandReference - The specified operand is a reference to a
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/// named operand such as $src. Resolve the Class and OperandInfo pointers.
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void AsmMatcherInfo::
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BuildInstructionOperandReference(MatchableInfo *II,
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buildInstructionOperandReference(MatchableInfo *II,
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StringRef OperandName,
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unsigned AsmOpIdx) {
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const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
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@ -1399,10 +1399,10 @@ BuildInstructionOperandReference(MatchableInfo *II,
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Op->SrcOpName = OperandName;
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}
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/// BuildAliasOperandReference - When parsing an operand reference out of the
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/// buildAliasOperandReference - When parsing an operand reference out of the
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/// matching string (e.g. "movsx $src, $dst"), determine what the class of the
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/// operand reference is by looking it up in the result pattern definition.
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void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
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void AsmMatcherInfo::buildAliasOperandReference(MatchableInfo *II,
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StringRef OperandName,
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MatchableInfo::AsmOperand &Op) {
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const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
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@ -1427,7 +1427,7 @@ void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
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OperandName.str() + "'");
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}
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void MatchableInfo::BuildInstructionResultOperands() {
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void MatchableInfo::buildInstructionResultOperands() {
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const CodeGenInstruction *ResultInst = getResultInst();
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// Loop over all operands of the result instruction, determining how to
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@ -1443,7 +1443,7 @@ void MatchableInfo::BuildInstructionResultOperands() {
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}
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// Find out what operand from the asmparser this MCInst operand comes from.
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int SrcOperand = FindAsmOperandNamed(OpInfo.Name);
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int SrcOperand = findAsmOperandNamed(OpInfo.Name);
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if (OpInfo.Name.empty() || SrcOperand == -1)
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throw TGError(TheDef->getLoc(), "Instruction '" +
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TheDef->getName() + "' has operand '" + OpInfo.Name +
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@ -1466,7 +1466,7 @@ void MatchableInfo::BuildInstructionResultOperands() {
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}
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}
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void MatchableInfo::BuildAliasResultOperands() {
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void MatchableInfo::buildAliasResultOperands() {
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const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
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const CodeGenInstruction *ResultInst = getResultInst();
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@ -1495,7 +1495,7 @@ void MatchableInfo::BuildAliasResultOperands() {
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switch (CGA.ResultOperands[AliasOpNo].Kind) {
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case CodeGenInstAlias::ResultOperand::K_Record: {
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StringRef Name = CGA.ResultOperands[AliasOpNo].getName();
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int SrcOperand = FindAsmOperand(Name, SubIdx);
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int SrcOperand = findAsmOperand(Name, SubIdx);
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if (SrcOperand == -1)
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throw TGError(TheDef->getLoc(), "Instruction '" +
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TheDef->getName() + "' has operand '" + OpName +
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@ -1520,7 +1520,7 @@ void MatchableInfo::BuildAliasResultOperands() {
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}
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}
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static void EmitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName,
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static void emitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName,
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std::vector<MatchableInfo*> &Infos,
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raw_ostream &OS) {
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// Write the convert function to a separate stream, so we can drop it after
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@ -1661,8 +1661,8 @@ static void EmitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName,
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OS << CvtOS.str();
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}
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/// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
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static void EmitMatchClassEnumeration(CodeGenTarget &Target,
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/// emitMatchClassEnumeration - Emit the enumeration for match class kinds.
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static void emitMatchClassEnumeration(CodeGenTarget &Target,
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std::vector<ClassInfo*> &Infos,
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raw_ostream &OS) {
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OS << "namespace {\n\n";
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@ -1692,8 +1692,8 @@ static void EmitMatchClassEnumeration(CodeGenTarget &Target,
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OS << "}\n\n";
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}
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/// EmitValidateOperandClass - Emit the function to validate an operand class.
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static void EmitValidateOperandClass(AsmMatcherInfo &Info,
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/// emitValidateOperandClass - Emit the function to validate an operand class.
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static void emitValidateOperandClass(AsmMatcherInfo &Info,
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raw_ostream &OS) {
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OS << "static bool validateOperandClass(MCParsedAsmOperand *GOp, "
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<< "MatchClassKind Kind) {\n";
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@ -1744,8 +1744,8 @@ static void EmitValidateOperandClass(AsmMatcherInfo &Info,
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OS << "}\n\n";
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}
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/// EmitIsSubclass - Emit the subclass predicate function.
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static void EmitIsSubclass(CodeGenTarget &Target,
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/// emitIsSubclass - Emit the subclass predicate function.
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static void emitIsSubclass(CodeGenTarget &Target,
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std::vector<ClassInfo*> &Infos,
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raw_ostream &OS) {
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OS << "/// isSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
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@ -1789,9 +1789,9 @@ static void EmitIsSubclass(CodeGenTarget &Target,
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OS << "}\n\n";
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}
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/// EmitMatchTokenString - Emit the function to match a token string to the
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/// emitMatchTokenString - Emit the function to match a token string to the
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/// appropriate match class value.
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static void EmitMatchTokenString(CodeGenTarget &Target,
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static void emitMatchTokenString(CodeGenTarget &Target,
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std::vector<ClassInfo*> &Infos,
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raw_ostream &OS) {
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// Construct the match list.
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@ -1813,9 +1813,9 @@ static void EmitMatchTokenString(CodeGenTarget &Target,
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OS << "}\n\n";
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}
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/// EmitMatchRegisterName - Emit the function to match a string to the target
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/// emitMatchRegisterName - Emit the function to match a string to the target
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/// specific register enum.
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static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
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static void emitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
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raw_ostream &OS) {
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// Construct the match list.
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std::vector<StringMatcher::StringPair> Matches;
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@ -1839,9 +1839,9 @@ static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
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OS << "}\n\n";
|
||||
}
|
||||
|
||||
/// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
|
||||
/// emitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
|
||||
/// definitions.
|
||||
static void EmitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
|
||||
static void emitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
|
||||
raw_ostream &OS) {
|
||||
OS << "// Flags for subtarget features that participate in "
|
||||
<< "instruction matching.\n";
|
||||
@ -1856,9 +1856,9 @@ static void EmitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
|
||||
OS << "};\n\n";
|
||||
}
|
||||
|
||||
/// EmitComputeAvailableFeatures - Emit the function to compute the list of
|
||||
/// emitComputeAvailableFeatures - Emit the function to compute the list of
|
||||
/// available features given a subtarget.
|
||||
static void EmitComputeAvailableFeatures(AsmMatcherInfo &Info,
|
||||
static void emitComputeAvailableFeatures(AsmMatcherInfo &Info,
|
||||
raw_ostream &OS) {
|
||||
std::string ClassName =
|
||||
Info.AsmParser->getValueAsString("AsmParserClassName");
|
||||
@ -1933,9 +1933,9 @@ static std::string GetAliasRequiredFeatures(Record *R,
|
||||
return Result;
|
||||
}
|
||||
|
||||
/// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
|
||||
/// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
|
||||
/// emit a function for them and return true, otherwise return false.
|
||||
static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
|
||||
static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
|
||||
// Ignore aliases when match-prefix is set.
|
||||
if (!MatchPrefix.empty())
|
||||
return false;
|
||||
@ -2023,7 +2023,7 @@ static const char *getMinimalTypeForRange(uint64_t Range) {
|
||||
return "uint8_t";
|
||||
}
|
||||
|
||||
static void EmitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
|
||||
static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
|
||||
const AsmMatcherInfo &Info, StringRef ClassName) {
|
||||
// Emit the static custom operand parsing table;
|
||||
OS << "namespace {\n";
|
||||
@ -2193,7 +2193,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
||||
|
||||
// Compute the information on the instructions to match.
|
||||
AsmMatcherInfo Info(AsmParser, Target, Records);
|
||||
Info.BuildInfo();
|
||||
Info.buildInfo();
|
||||
|
||||
// Sort the instruction table using the partial order on classes. We use
|
||||
// stable_sort to ensure that ambiguous instructions are still
|
||||
@ -2216,7 +2216,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
||||
MatchableInfo &A = *Info.Matchables[i];
|
||||
MatchableInfo &B = *Info.Matchables[j];
|
||||
|
||||
if (A.CouldMatchAmbiguouslyWith(B)) {
|
||||
if (A.couldMatchAmbiguouslyWith(B)) {
|
||||
errs() << "warning: ambiguous matchables:\n";
|
||||
A.dump();
|
||||
errs() << "\nis incomparable with:\n";
|
||||
@ -2232,7 +2232,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
||||
});
|
||||
|
||||
// Compute the information on the custom operand parsing.
|
||||
Info.BuildOperandMatchInfo();
|
||||
Info.buildOperandMatchInfo();
|
||||
|
||||
// Write the output.
|
||||
|
||||
@ -2274,10 +2274,10 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
||||
OS << "#undef GET_REGISTER_MATCHER\n\n";
|
||||
|
||||
// Emit the subtarget feature enumeration.
|
||||
EmitSubtargetFeatureFlagEnumeration(Info, OS);
|
||||
emitSubtargetFeatureFlagEnumeration(Info, OS);
|
||||
|
||||
// Emit the function to match a register name to number.
|
||||
EmitMatchRegisterName(Target, AsmParser, OS);
|
||||
emitMatchRegisterName(Target, AsmParser, OS);
|
||||
|
||||
OS << "#endif // GET_REGISTER_MATCHER\n\n";
|
||||
|
||||
@ -2286,25 +2286,25 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
||||
OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
|
||||
|
||||
// Generate the function that remaps for mnemonic aliases.
|
||||
bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
|
||||
bool HasMnemonicAliases = emitMnemonicAliases(OS, Info);
|
||||
|
||||
// Generate the unified function to convert operands into an MCInst.
|
||||
EmitConvertToMCInst(Target, ClassName, Info.Matchables, OS);
|
||||
emitConvertToMCInst(Target, ClassName, Info.Matchables, OS);
|
||||
|
||||
// Emit the enumeration for classes which participate in matching.
|
||||
EmitMatchClassEnumeration(Target, Info.Classes, OS);
|
||||
emitMatchClassEnumeration(Target, Info.Classes, OS);
|
||||
|
||||
// Emit the routine to match token strings to their match class.
|
||||
EmitMatchTokenString(Target, Info.Classes, OS);
|
||||
emitMatchTokenString(Target, Info.Classes, OS);
|
||||
|
||||
// Emit the subclass predicate routine.
|
||||
EmitIsSubclass(Target, Info.Classes, OS);
|
||||
emitIsSubclass(Target, Info.Classes, OS);
|
||||
|
||||
// Emit the routine to validate an operand against a match class.
|
||||
EmitValidateOperandClass(Info, OS);
|
||||
emitValidateOperandClass(Info, OS);
|
||||
|
||||
// Emit the available features compute function.
|
||||
EmitComputeAvailableFeatures(Info, OS);
|
||||
emitComputeAvailableFeatures(Info, OS);
|
||||
|
||||
|
||||
size_t MaxNumOperands = 0;
|
||||
@ -2529,7 +2529,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
||||
OS << "}\n\n";
|
||||
|
||||
if (Info.OperandMatchInfo.size())
|
||||
EmitCustomOperandParsing(OS, Target, Info, ClassName);
|
||||
emitCustomOperandParsing(OS, Target, Info, ClassName);
|
||||
|
||||
OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user