From 8cf6c60710c7924bcd0235f37e4d613f9abf7dc6 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Wed, 29 Sep 2010 22:24:45 +0000 Subject: [PATCH] Add a convenience variable so I'm not chasing all over looking for a context. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115094 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMFastISel.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 53ae75200f8..a79f2994856 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -61,8 +61,9 @@ class ARMFastISel : public FastISel { const TargetLowering &TLI; const ARMFunctionInfo *AFI; - // Convenience variable to avoid checking all the time. + // Convenience variables to avoid some queries. bool isThumb; + LLVMContext *Context; public: explicit ARMFastISel(FunctionLoweringInfo &funcInfo) @@ -73,6 +74,7 @@ class ARMFastISel : public FastISel { Subtarget = &TM.getSubtarget(); AFI = funcInfo.MF->getInfo(); isThumb = AFI->isThumbFunction(); + Context = &funcInfo.Fn->getContext(); } // Code from FastISel.cpp. @@ -852,7 +854,7 @@ bool ARMFastISel::SelectCmp(const Instruction *I) { unsigned MovCCOpc = isThumb ? ARM::tMOVCCi : ARM::MOVCCi; unsigned DestReg = createResultReg(ARM::GPRRegisterClass); Constant *Zero - = ConstantInt::get(Type::getInt32Ty(I->getType()->getContext()), 0); + = ConstantInt::get(Type::getInt32Ty(*Context), 0); unsigned ZeroReg = TargetMaterializeConstant(Zero); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(MovCCOpc), DestReg) .addReg(ZeroReg).addImm(1) @@ -1083,8 +1085,7 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) { } SmallVector ArgLocs; - CCState CCInfo(CC, false, TM, ArgLocs, - I->getParent()->getParent()->getContext()); + CCState CCInfo(CC, false, TM, ArgLocs, *Context); CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CCAssignFnForCall(CC, false)); // Get a count of how many bytes are to be pushed on the stack. @@ -1146,8 +1147,7 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) { SmallVector UsedRegs; if (RetVT.getSimpleVT().SimpleTy != MVT::isVoid) { SmallVector RVLocs; - CCState CCInfo(CC, false, TM, RVLocs, - I->getParent()->getParent()->getContext()); + CCState CCInfo(CC, false, TM, RVLocs, *Context); CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true)); // Copy all of the result registers out of their specified physreg.