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- Identify a vector_shuffle that can be turned into an undef, e.g.

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shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
  optimal code by failing to identify MOVL (move to lowest element of a
  vector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30171 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-09-08 01:50:06 +00:00
parent fde1b3bb2f
commit 8cf723d8eb
1 changed files with 41 additions and 15 deletions
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56
lib/Target/X86/X86ISelLowering.cpp
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@ -1719,7 +1719,8 @@ bool X86::isMOVLMask(SDNode *N) {
/// isCommutedMOVL - Returns true if the shuffle mask is except the reverse /// isCommutedMOVL - Returns true if the shuffle mask is except the reverse
/// of what x86 movss want. X86 movs requires the lowest element to be lowest /// of what x86 movss want. X86 movs requires the lowest element to be lowest
/// element of vector 2 and the other elements to come from vector 1 in order. /// element of vector 2 and the other elements to come from vector 1 in order.
static bool isCommutedMOVL(std::vector<SDOperand> &Ops, bool V2IsSplat = false) { static bool isCommutedMOVL(std::vector<SDOperand> &Ops, bool V2IsSplat = false,
bool V2IsUndef = false) {
unsigned NumElems = Ops.size(); unsigned NumElems = Ops.size();
if (NumElems != 2 && NumElems != 4 && NumElems != 8 && NumElems != 16) if (NumElems != 2 && NumElems != 4 && NumElems != 8 && NumElems != 16)
return false; return false;
@ -1729,22 +1730,20 @@ static bool isCommutedMOVL(std::vector<SDOperand> &Ops, bool V2IsSplat = false)
for (unsigned i = 1; i < NumElems; ++i) { for (unsigned i = 1; i < NumElems; ++i) {
SDOperand Arg = Ops[i]; SDOperand Arg = Ops[i];
if (V2IsSplat) { if (!(isUndefOrEqual(Arg, i+NumElems) ||
if (!isUndefOrEqual(Arg, NumElems)) (V2IsUndef && isUndefOrInRange(Arg, NumElems, NumElems*2)) ||
return false; (V2IsSplat && isUndefOrEqual(Arg, NumElems))))
} else { return false;
if (!isUndefOrEqual(Arg, i+NumElems))
return false;
}
} }
return true; return true;
} }
static bool isCommutedMOVL(SDNode *N, bool V2IsSplat = false) { static bool isCommutedMOVL(SDNode *N, bool V2IsSplat = false,
bool V2IsUndef = false) {
assert(N->getOpcode() == ISD::BUILD_VECTOR); assert(N->getOpcode() == ISD::BUILD_VECTOR);
std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
return isCommutedMOVL(Ops, V2IsSplat); return isCommutedMOVL(Ops, V2IsSplat, V2IsUndef);
} }
/// isMOVSHDUPMask - Return true if the specified VECTOR_SHUFFLE operand /// isMOVSHDUPMask - Return true if the specified VECTOR_SHUFFLE operand
@ -2034,6 +2033,29 @@ static bool isSplatVector(SDNode *N) {
return true; return true;
} }
/// isUndefShuffle - Returns true if N is a VECTOR_SHUFFLE that can be resolved
/// to an undef.
static bool isUndefShuffle(SDNode *N) {
if (N->getOpcode() != ISD::BUILD_VECTOR)
return false;
SDOperand V1 = N->getOperand(0);
SDOperand V2 = N->getOperand(1);
SDOperand Mask = N->getOperand(2);
unsigned NumElems = Mask.getNumOperands();
for (unsigned i = 0; i != NumElems; ++i) {
SDOperand Arg = Mask.getOperand(i);
if (Arg.getOpcode() != ISD::UNDEF) {
unsigned Val = cast<ConstantSDNode>(Arg)->getValue();
if (Val < NumElems && V1.getOpcode() != ISD::UNDEF)
return false;
else if (Val >= NumElems && V2.getOpcode() != ISD::UNDEF)
return false;
}
}
return true;
}
/// NormalizeMask - V2 is a splat, modify the mask (if needed) so all elements /// NormalizeMask - V2 is a splat, modify the mask (if needed) so all elements
/// that point to V2 points to its first element. /// that point to V2 points to its first element.
static SDOperand NormalizeMask(SDOperand Mask, SelectionDAG &DAG) { static SDOperand NormalizeMask(SDOperand Mask, SelectionDAG &DAG) {
@ -2402,6 +2424,9 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) {
bool V1IsUndef = V1.getOpcode() == ISD::UNDEF; bool V1IsUndef = V1.getOpcode() == ISD::UNDEF;
bool V2IsUndef = V2.getOpcode() == ISD::UNDEF; bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
if (isUndefShuffle(Op.Val))
return DAG.getNode(ISD::UNDEF, VT);
if (isSplatMask(PermMask.Val)) { if (isSplatMask(PermMask.Val)) {
if (NumElems <= 4) return Op; if (NumElems <= 4) return Op;
// Promote it to a v4i32 splat. // Promote it to a v4i32 splat.
@ -2422,17 +2447,18 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) {
ShouldXformToMOVLP(V1.Val, PermMask.Val)) ShouldXformToMOVLP(V1.Val, PermMask.Val))
return CommuteVectorShuffle(Op, DAG); return CommuteVectorShuffle(Op, DAG);
bool V1IsSplat = isSplatVector(V1.Val) || V1.getOpcode() == ISD::UNDEF; bool V1IsSplat = isSplatVector(V1.Val);
bool V2IsSplat = isSplatVector(V2.Val) || V2.getOpcode() == ISD::UNDEF; bool V2IsSplat = isSplatVector(V2.Val);
if (V1IsSplat && !V2IsSplat) { if ((V1IsSplat || V1IsUndef) && !(V2IsSplat || V2IsUndef)) {
Op = CommuteVectorShuffle(Op, DAG); Op = CommuteVectorShuffle(Op, DAG);
V1 = Op.getOperand(0); V1 = Op.getOperand(0);
V2 = Op.getOperand(1); V2 = Op.getOperand(1);
PermMask = Op.getOperand(2); PermMask = Op.getOperand(2);
V2IsSplat = true; std::swap(V1IsSplat, V2IsSplat);
std::swap(V1IsUndef, V2IsUndef);
} }
if (isCommutedMOVL(PermMask.Val, V2IsSplat)) { if (isCommutedMOVL(PermMask.Val, V2IsSplat, V2IsUndef)) {
if (V2IsUndef) return V1; if (V2IsUndef) return V1;
Op = CommuteVectorShuffle(Op, DAG); Op = CommuteVectorShuffle(Op, DAG);
V1 = Op.getOperand(0); V1 = Op.getOperand(0);