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Bugfix: SCEVExpander incorrectly marks increment operations as no-wrap
When emitting the increment operation, SCEVExpander marks the operation as nuw or nsw based on the flags on the preincrement SCEV. This is incorrect because, for instance, it is possible that {-6,+,1} is <nuw> while {-6,+,1}+1 = {-5,+,1} is not. This change teaches SCEV to mark the increment as nuw/nsw only if it can explicitly prove that the increment operation won't overflow. Apart from the attached test case, another (more realistic) manifestation of the bug can be seen in Transforms/IndVarSimplify/pr20680.ll. NOTE: this change was landed with an incorrect commit message in rL230275 and was reverted for that reason in rL230279. This commit message is the correct one. Differential Revision: http://reviews.llvm.org/D7778 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230280 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1063,6 +1063,34 @@ static bool canBeCheaplyTransformed(ScalarEvolution &SE,
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return false;
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}
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static bool IsIncrementNSW(ScalarEvolution &SE, const SCEVAddRecExpr *AR) {
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if (!isa<IntegerType>(AR->getType()))
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return false;
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unsigned BitWidth = cast<IntegerType>(AR->getType())->getBitWidth();
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Type *WideTy = IntegerType::get(AR->getType()->getContext(), BitWidth * 2);
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const SCEV *Step = AR->getStepRecurrence(SE);
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const SCEV *OpAfterExtend = SE.getAddExpr(SE.getSignExtendExpr(Step, WideTy),
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SE.getSignExtendExpr(AR, WideTy));
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const SCEV *ExtendAfterOp =
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SE.getSignExtendExpr(SE.getAddExpr(AR, Step), WideTy);
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return ExtendAfterOp == OpAfterExtend;
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}
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static bool IsIncrementNUW(ScalarEvolution &SE, const SCEVAddRecExpr *AR) {
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if (!isa<IntegerType>(AR->getType()))
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return false;
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unsigned BitWidth = cast<IntegerType>(AR->getType())->getBitWidth();
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Type *WideTy = IntegerType::get(AR->getType()->getContext(), BitWidth * 2);
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const SCEV *Step = AR->getStepRecurrence(SE);
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const SCEV *OpAfterExtend = SE.getAddExpr(SE.getZeroExtendExpr(Step, WideTy),
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SE.getZeroExtendExpr(AR, WideTy));
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const SCEV *ExtendAfterOp =
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SE.getZeroExtendExpr(SE.getAddExpr(AR, Step), WideTy);
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return ExtendAfterOp == OpAfterExtend;
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}
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/// getAddRecExprPHILiterally - Helper for expandAddRecExprLiterally. Expand
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/// the base addrec, which is the addrec without any non-loop-dominating
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/// values, and return the PHI.
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@ -1213,10 +1241,11 @@ SCEVExpander::getAddRecExprPHILiterally(const SCEVAddRecExpr *Normalized,
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IVIncInsertPos : Pred->getTerminator();
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Builder.SetInsertPoint(InsertPos);
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Value *IncV = expandIVInc(PN, StepV, L, ExpandTy, IntTy, useSubtract);
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if (isa<OverflowingBinaryOperator>(IncV)) {
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if (Normalized->getNoWrapFlags(SCEV::FlagNUW))
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if (IsIncrementNUW(SE, Normalized))
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cast<BinaryOperator>(IncV)->setHasNoUnsignedWrap();
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if (Normalized->getNoWrapFlags(SCEV::FlagNSW))
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if (IsIncrementNSW(SE, Normalized))
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cast<BinaryOperator>(IncV)->setHasNoSignedWrap();
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}
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PN->addIncoming(IncV, Pred);
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@ -0,0 +1,30 @@
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; RUN: opt -indvars -S < %s | FileCheck %s
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declare void @use(i32)
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declare void @use.i8(i8)
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define void @f() {
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; CHECK-LABEL: @f
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entry:
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br label %loop
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loop:
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; The only use for idx.mirror is to induce an nuw for %idx. It does
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; not induce an nuw for %idx.inc
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%idx.mirror = phi i8 [ -6, %entry ], [ %idx.mirror.inc, %loop ]
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%idx = phi i8 [ -5, %entry ], [ %idx.inc, %loop ]
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%idx.sext = sext i8 %idx to i32
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call void @use(i32 %idx.sext)
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%idx.mirror.inc = add nuw i8 %idx.mirror, 1
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call void @use.i8(i8 %idx.mirror.inc)
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%idx.inc = add i8 %idx, 1
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; CHECK-NOT: %indvars.iv.next = add nuw nsw i32 %indvars.iv, 1
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%cmp = icmp ugt i8 %idx.inc, 0
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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@ -43,7 +43,7 @@ if.end: ; preds = %if.end, %for.cond1.
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%shl = and i32 %conv7, 510
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store i32 %shl, i32* @c, align 4
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; CHECK: %lsr.iv.next = add i32 %lsr.iv, -258
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; CHECK: %lsr.iv.next = add nsw i32 %lsr.iv, -258
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%dec = add i8 %2, -1
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%cmp2 = icmp sgt i8 %dec, -1
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@ -20,7 +20,7 @@ for.body: ; preds = %for.body, %entry
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%arrayidx = getelementptr inbounds double* %b, i64 %tmp
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%tmp1 = load double* %arrayidx, align 8
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; The induction variable should carry the scaling factor: 1 * 8 = 8.
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; CHECK: [[IVNEXT]] = add nuw i64 [[IV]], 8
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; CHECK: [[IVNEXT]] = add nuw nsw i64 [[IV]], 8
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%indvars.iv.next = add i64 %indvars.iv, 1
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%arrayidx2 = getelementptr inbounds double* %c, i64 %indvars.iv.next
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%tmp2 = load double* %arrayidx2, align 8
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@ -22,7 +22,7 @@ for.body: ; preds = %for.body, %entry
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%arrayidx = getelementptr inbounds double* %b, i64 %tmp
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%tmp1 = load double* %arrayidx, align 8
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; The induction variable should carry the scaling factor: 1.
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; CHECK: [[IVNEXT]] = add nuw i64 [[IV]], 1
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; CHECK: [[IVNEXT]] = add nuw nsw i64 [[IV]], 1
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%indvars.iv.next = add i64 %indvars.iv, 1
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%arrayidx2 = getelementptr inbounds double* %c, i64 %indvars.iv.next
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%tmp2 = load double* %arrayidx2, align 8
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@ -9,7 +9,7 @@ target triple = "x86_64-apple-macosx"
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; CHECK: @llvm.sadd.with.overflow
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; CHECK-LABEL: loop2:
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; CHECK-NOT: extractvalue
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; CHECK: add nuw nsw
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; CHECK: add nuw
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; CHECK: @llvm.sadd.with.overflow
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; CHECK-LABEL: loop3:
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; CHECK-NOT: extractvalue
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@ -204,8 +204,8 @@ for.cond2.for.inc13_crit_edge: ; preds = %for.cond2.for.inc13
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br label %for.inc13
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; CHECK: [[for_inc13]]:
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; CHECK-NEXT: %[[indvars_iv_next]] = add nuw nsw i32 %[[indvars_iv]], 1
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; CHECK-NEXT: %[[exitcond4:.*]] = icmp ne i32 %[[indvars_iv]], -1
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; CHECK-NEXT: %[[indvars_iv_next]] = add nsw i32 %[[indvars_iv]], 1
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; CHECK-NEXT: %[[exitcond4:.*]] = icmp ne i32 %[[indvars_iv_next]], 0
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; CHECK-NEXT: br i1 %[[exitcond4]], label %[[for_cond2_preheader]], label %[[for_end15:.*]]
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for.inc13: ; preds = %for.cond2.for.inc13_crit_edge, %for.cond2.preheader
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%inc14 = add i8 %storemerge15, 1
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@ -19,7 +19,7 @@ bb3: ; preds = %bb1
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%tmp4 = add i32 %c_addr.1, -1 ; <i32> [#uses=1]
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%c_addr.1.be = select i1 %tmp2, i32 %tmp3, i32 %tmp4 ; <i32> [#uses=1]
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
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; CHECK: add i32 %lsr.iv, -1
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; CHECK: add nsw i32 %lsr.iv, -1
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br label %bb6
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bb6: ; preds = %bb3, %entry
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@ -59,7 +59,7 @@ bb:
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; CHECK: loop0:
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; Induction variable is initialized to -2.
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; CHECK-NEXT: [[PHIIV:%[^ ]+]] = phi i32 [ [[IVNEXT:%[^ ]+]], %loop0 ], [ -2, %bb ]
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; CHECK-NEXT: [[IVNEXT]] = add i32 [[PHIIV]], 1
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; CHECK-NEXT: [[IVNEXT]] = add nuw nsw i32 [[PHIIV]], 1
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; CHECK-NEXT: br i1 false, label %loop0, label %bb0
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loop0: ; preds = %loop0, %bb
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%i0 = phi i32 [ %i0.next, %loop0 ], [ 0, %bb ] ; <i32> [#uses=2]
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