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[Mips] Fix for decoding DINS instruction - disassembler
This patch fixes decoding of size and position for DINSM and DINSU instructions. Differential Revision: https://reviews.llvm.org/D31072 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298593 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2264,7 +2264,14 @@ static DecodeStatus DecodeInsSize(MCInst &Inst,
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const void *Decoder) {
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// First we need to grab the pos(lsb) from MCInst.
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int Pos = Inst.getOperand(2).getImm();
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int Size = (int) Insn - Pos + 1;
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if (Inst.getOpcode() == Mips::DINSU)
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Pos += 32;
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int Size;
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if (Inst.getOpcode() == Mips::DINSM ||
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Inst.getOpcode() == Mips::DINSU)
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Size = (int) Insn - Pos + 33;
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else
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Size = (int) Insn - Pos + 1;
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Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Size)));
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return MCDisassembler::Success;
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}
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@ -5,5 +5,5 @@
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dextu $2, $4, 34, 6 # CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
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dextm $2, $4, 5, 34 # CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
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dins $4, $5, 8, 10 # CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10
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dinsm $4, $5, 10, 1 # CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 10, 1
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dinsm $4, $5, 30, 6 # CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 30, 6
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dinsu $4, $5, 40, 13 # CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13
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