From 8f0ad582e81e24f2ab35f9e9d2308339c8e8cbeb Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Mon, 28 Apr 2008 16:58:24 +0000 Subject: [PATCH] Teach DAGCombine to convert (sext x) to (zext x) when the sign-bit of x is known to be zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 6ac549b9cf3..dc59006fcfb 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2887,6 +2887,10 @@ SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) { if (SCC.Val) return SCC; } + // fold (sext x) -> (zext x) if the sign bit is known zero. + if (DAG.SignBitIsZero(N0)) + return DAG.getNode(ISD::ZERO_EXTEND, VT, N0); + return SDOperand(); }