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emit FMR instructions to convert f64<->f32 instructions, so things like
STOREs, know the right type to store. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23139 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1113,14 +1113,13 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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CurDAG->SelectNodeTo(N, PPC::FABS, N->getValueType(0),
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Select(N->getOperand(0)));
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break;
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case ISD::FP_EXTEND: {
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case ISD::FP_EXTEND:
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assert(MVT::f64 == N->getValueType(0) &&
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MVT::f32 == N->getOperand(0).getValueType() && "Illegal FP_EXTEND");
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std::vector<SDOperand> Tmp;
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Tmp.push_back(Select(N->getOperand(0)));
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CurDAG->ReplaceAllUsesWith(N, Tmp); // Just use the operand as the result.
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return Tmp[0];
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}
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// We need to emit an FMR to make sure that the result has the right value
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// type.
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CurDAG->SelectNodeTo(N, PPC::FMR, MVT::f64, Select(N->getOperand(0)));
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break;
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case ISD::FP_ROUND:
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assert(MVT::f32 == N->getValueType(0) &&
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MVT::f64 == N->getOperand(0).getValueType() && "Illegal FP_ROUND");
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@ -1560,7 +1559,12 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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case MVT::f32:
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case MVT::f64:
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Chain = CurDAG->getCopyFromReg(Chain, PPC::F1, MVT::f64).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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if (N->getValueType(0) == MVT::f64)
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CallResults.push_back(Chain.getValue(0));
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else
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// Insert an FMR to convert the result to f32 from f64.
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CallResults.push_back(CurDAG->getTargetNode(PPC::FMR, MVT::f32,
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Chain.getValue(0)));
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break;
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}
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@ -1575,8 +1579,11 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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SDOperand Val = Select(N->getOperand(1));
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switch (N->getOperand(1).getValueType()) {
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default: assert(0 && "Unknown return type!");
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case MVT::f64:
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case MVT::f32:
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// Insert a copy to get the type right.
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Val = CurDAG->getTargetNode(PPC::FMR, MVT::f64, Val);
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// FALL THROUGH
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case MVT::f64:
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Chain = CurDAG->getCopyToReg(Chain, PPC::F1, Val);
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break;
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case MVT::i32:
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